[AArch64] Restrict usage of FP/SIMD registers for TImode reload and absdi2 patterns for non-float/simd targets.
* config/aarch64/aarch64.md (absdi2): Set simd attribute. (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT. (aarch64_movdi_<mode>high): Likewise. (aarch64_mov<mode>high_di): Likewise. (aarch64_movdi_<mode>low): Likewise. (aarch64_mov<mode>low_di): Likewise. (aarch64_movtilow_tilow): Likewise. Add comment explaining usage of fp,simd attributes and of TARGET_FLOAT and TARGET_SIMD. From-SVN: r213712
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@ -1,3 +1,15 @@
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2014-08-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64.md (absdi2): Set simd attribute.
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(aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
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(aarch64_movdi_<mode>high): Likewise.
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(aarch64_mov<mode>high_di): Likewise.
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(aarch64_movdi_<mode>low): Likewise.
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(aarch64_mov<mode>low_di): Likewise.
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(aarch64_movtilow_tilow): Likewise.
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Add comment explaining usage of fp,simd attributes and of
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TARGET_FLOAT and TARGET_SIMD.
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2014-08-07 Ian Bolton <ian.bolton@arm.com>
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Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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@ -141,12 +141,22 @@
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; to share pipeline descriptions.
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(include "../arm/types.md")
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;; It is important to set the fp or simd attributes to yes when a pattern
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;; alternative uses the FP or SIMD register files, usually signified by use of
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;; the 'w' constraint. This will ensure that the alternative will be
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;; disabled when compiling with -mgeneral-regs-only or with the +nofp/+nosimd
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;; architecture extensions. If all the alternatives in a pattern use the
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;; FP or SIMD registers then the pattern predicate should include TARGET_FLOAT
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;; or TARGET_SIMD.
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;; Attribute that specifies whether or not the instruction touches fp
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;; registers.
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;; registers. When this is set to yes for an alternative, that alternative
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;; will be disabled when !TARGET_FLOAT.
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(define_attr "fp" "no,yes" (const_string "no"))
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;; Attribute that specifies whether or not the instruction touches simd
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;; registers.
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;; registers. When this is set to yes for an alternative, that alternative
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;; will be disabled when !TARGET_SIMD.
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(define_attr "simd" "no,yes" (const_string "no"))
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(define_attr "length" ""
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@ -1954,7 +1964,8 @@
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GEN_INT (63)))));
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DONE;
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}
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[(set_attr "type" "alu_sreg")]
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[(set_attr "type" "alu_sreg")
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(set_attr "simd" "no,yes")]
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)
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(define_insn "neg<mode>2"
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@ -3728,7 +3739,7 @@
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(match_operand:TX 1 "register_operand" "w"))
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(clobber (match_operand:DI 2 "register_operand" "=&r"))
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]
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""
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"TARGET_FLOAT"
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{
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rtx op0 = simplify_gen_subreg (TImode, operands[0], <MODE>mode, 0);
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rtx op1 = simplify_gen_subreg (TImode, operands[1], <MODE>mode, 0);
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@ -3746,7 +3757,7 @@
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(define_insn "aarch64_movdi_<mode>low"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(truncate:DI (match_operand:TX 1 "register_operand" "w")))]
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"reload_completed || reload_in_progress"
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"TARGET_FLOAT && (reload_completed || reload_in_progress)"
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"fmov\\t%x0, %d1"
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[(set_attr "type" "f_mrc")
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(set_attr "length" "4")
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@ -3757,7 +3768,7 @@
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(truncate:DI
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(lshiftrt:TX (match_operand:TX 1 "register_operand" "w")
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(const_int 64))))]
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"reload_completed || reload_in_progress"
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"TARGET_FLOAT && (reload_completed || reload_in_progress)"
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"fmov\\t%x0, %1.d[1]"
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[(set_attr "type" "f_mrc")
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(set_attr "length" "4")
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@ -3767,7 +3778,7 @@
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[(set (zero_extract:TX (match_operand:TX 0 "register_operand" "+w")
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(const_int 64) (const_int 64))
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(zero_extend:TX (match_operand:DI 1 "register_operand" "r")))]
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"reload_completed || reload_in_progress"
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"TARGET_FLOAT && (reload_completed || reload_in_progress)"
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"fmov\\t%0.d[1], %x1"
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[(set_attr "type" "f_mcr")
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(set_attr "length" "4")
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@ -3776,7 +3787,7 @@
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(define_insn "aarch64_mov<mode>low_di"
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[(set (match_operand:TX 0 "register_operand" "=w")
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(zero_extend:TX (match_operand:DI 1 "register_operand" "r")))]
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"reload_completed || reload_in_progress"
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"TARGET_FLOAT && (reload_completed || reload_in_progress)"
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"fmov\\t%d0, %x1"
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[(set_attr "type" "f_mcr")
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(set_attr "length" "4")
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@ -3786,7 +3797,7 @@
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[(set (match_operand:TI 0 "register_operand" "=w")
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(zero_extend:TI
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(truncate:DI (match_operand:TI 1 "register_operand" "w"))))]
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"reload_completed || reload_in_progress"
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"TARGET_FLOAT && (reload_completed || reload_in_progress)"
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"fmov\\t%d0, %d1"
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[(set_attr "type" "fmov")
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(set_attr "length" "4")
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