i386.md (subsi3_carry_zext): Remove "m" constraint for "register_operand".
* config/i386/i386.md (subsi3_carry_zext): Remove "m" constraint for "register_operand". (*iorsi_1_zext): Likewise. (*iorsi_1_zext_imm): Likewise. * config/i386/sse.md: (*sse4_1_extractps): Use "nonimmediate_operand" with "rm"/"xm" constraint. (sse2_vmsqrtv2df2): Likewise. From-SVN: r127515
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@ -1,3 +1,13 @@
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2007-08-15 Rask Ingemann Lambertsen <rask@sygehus.dk>
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* config/i386/i386.md (subsi3_carry_zext): Remove "m" constraint for
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"register_operand".
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(*iorsi_1_zext): Likewise.
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(*iorsi_1_zext_imm): Likewise.
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* config/i386/sse.md: (*sse4_1_extractps): Use "nonimmediate_operand"
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with "rm"/"xm" constraint.
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(sse2_vmsqrtv2df2): Likewise.
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2007-08-15 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/33074
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@ -6722,11 +6722,11 @@
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(set_attr "mode" "SI")])
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(define_insn "subsi3_carry_zext"
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[(set (match_operand:DI 0 "register_operand" "=rm,r")
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[(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI
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(minus:SI (match_operand:SI 1 "register_operand" "0,0")
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(minus:SI (match_operand:SI 1 "register_operand" "0")
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(plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "")
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(match_operand:SI 2 "general_operand" "ri,rm")))))
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(match_operand:SI 2 "general_operand" "rim")))))
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(clobber (reg:CC FLAGS_REG))]
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"TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
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"sbb{l}\t{%2, %k0|%k0, %2}"
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@ -8738,7 +8738,7 @@
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;; See comment for addsi_1_zext why we do use nonimmediate_operand
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(define_insn "*iorsi_1_zext"
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[(set (match_operand:DI 0 "register_operand" "=rm")
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[(set (match_operand:DI 0 "register_operand" "=r")
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(zero_extend:DI
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(ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
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(match_operand:SI 2 "general_operand" "rim"))))
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@ -8749,7 +8749,7 @@
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(set_attr "mode" "SI")])
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(define_insn "*iorsi_1_zext_imm"
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[(set (match_operand:DI 0 "register_operand" "=rm")
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[(set (match_operand:DI 0 "register_operand" "=r")
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(ior:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
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(match_operand:DI 2 "x86_64_zext_immediate_operand" "Z")))
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(clobber (reg:CC FLAGS_REG))]
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@ -1532,7 +1532,7 @@
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})
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(define_insn "*sse4_1_extractps"
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[(set (match_operand:SF 0 "register_operand" "=rm")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=rm")
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(vec_select:SF
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(match_operand:V4SF 1 "register_operand" "x")
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(parallel [(match_operand:SI 2 "const_0_to_3_operand" "n")])))]
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@ -1694,7 +1694,7 @@
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(define_insn "sse2_vmsqrtv2df2"
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[(set (match_operand:V2DF 0 "register_operand" "=x")
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(vec_merge:V2DF
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(sqrt:V2DF (match_operand:V2DF 1 "register_operand" "xm"))
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(sqrt:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "xm"))
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(match_operand:V2DF 2 "register_operand" "0")
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(const_int 1)))]
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"TARGET_SSE2"
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