m68hc11.md ("bitcmpqi" split): No need to test the mode of operand 0.
* config/m68hc11/m68hc11.md ("bitcmpqi" split): No need to test the mode of operand 0. (peephole2 optimize const load): Likewise for operand 2. ("*rotlhi3_with_carry"): Change pattern to a const 1 rotate which clobbers CC_REGNUM. ("*rotrhi3_with_carry"): Likewise. (ashift:DI 1 split): Update pattern to create the above rotate. (lshiftrt:DI 1 split): Likewise. From-SVN: r65524
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@ -1,3 +1,14 @@
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2003-04-12 Stephane Carrez <stcarrez@nerim.fr>
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* config/m68hc11/m68hc11.md ("bitcmpqi" split): No need to test the
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mode of operand 0.
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(peephole2 optimize const load): Likewise for operand 2.
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("*rotlhi3_with_carry"): Change pattern to a const 1 rotate which
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clobbers CC_REGNUM.
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("*rotrhi3_with_carry"): Likewise.
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(ashift:DI 1 split): Update pattern to create the above rotate.
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(lshiftrt:DI 1 split): Likewise.
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2003-04-12 Stephane Carrez <stcarrez@nerim.fr>
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* config/m68hc11/m68hc11.md (SOFT_Z_REGNUM): New constant.
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@ -445,7 +445,7 @@
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[(set (cc0)
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(and:QI (match_operand:QI 0 "tst_operand" "")
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(match_operand:QI 1 "hard_addr_reg_operand" "")))]
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"z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode"
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"z_replacement_completed == 2"
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[(set (match_dup 3) (match_dup 2))
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(set (cc0) (and:QI (match_dup 0) (match_dup 4)))]
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"operands[2] = gen_rtx (REG, HImode, REGNO (operands[1]));
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@ -4472,15 +4472,21 @@
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(set (match_dup 4) (match_dup 2))
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(set (match_dup 2) (match_dup 5))
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(set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2)
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(rotate:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 6) (match_dup 2))
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(set (match_dup 2) (match_dup 7))
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(set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2)
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(rotate:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 8) (match_dup 2))
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(set (match_dup 2) (match_dup 9))
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(set (match_dup 2) (rotate:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2)
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(rotate:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 10) (match_dup 2))]
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"operands[3] = m68hc11_gen_lowpart (SImode, operands[1]);
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operands[5] = m68hc11_gen_highpart (HImode, operands[3]);
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@ -5335,15 +5341,18 @@
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(set (match_dup 4) (match_dup 2))
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(set (match_dup 2) (match_dup 5))
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(set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 6) (match_dup 2))
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(set (match_dup 2) (match_dup 7))
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(set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 8) (match_dup 2))
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(set (match_dup 2) (match_dup 9))
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(set (match_dup 2) (rotatert:HI (match_dup 2) (reg:HI CC_REGNUM)))
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(parallel [(set (match_dup 2) (rotatert:HI (match_dup 2) (const_int 1)))
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(clobber (reg:HI CC_REGNUM))])
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(set (match_dup 10) (match_dup 2))]
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"operands[3] = m68hc11_gen_highpart (SImode, operands[1]);
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operands[5] = m68hc11_gen_lowpart (HImode, operands[3]);
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@ -5770,7 +5779,8 @@
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(define_insn "*rotlhi3_with_carry"
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[(set (match_operand:HI 0 "register_operand" "=d")
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(rotate:HI (match_operand:HI 1 "register_operand" "0")
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(reg:HI CC_REGNUM)))]
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(const_int 1)))
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(clobber (reg:HI CC_REGNUM))]
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""
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"*
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{
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@ -5781,7 +5791,8 @@
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(define_insn "*rotrhi3_with_carry"
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[(set (match_operand:HI 0 "register_operand" "=d")
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(rotatert:HI (match_operand:HI 1 "register_operand" "0")
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(reg:HI CC_REGNUM)))]
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(const_int 1)))
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(clobber (reg:HI CC_REGNUM))]
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""
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"*
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{
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@ -6713,8 +6724,7 @@
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(set (match_operand:HI 2 "hard_reg_operand" "")
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(match_dup 1))]
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"(D_REG_P (operands[2]) || X_REG_P (operands[2]) || Y_REG_P (operands[2]))
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&& !reg_mentioned_p (operands[2], operands[0])
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&& GET_MODE (operands[2]) == HImode"
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&& !reg_mentioned_p (operands[2], operands[0])"
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[(set (match_dup 2) (match_dup 1))
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(set (match_dup 0) (match_dup 2))]
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"")
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