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read-rtl.c: Fix formatting. 

* read-rtl.c: Fix formatting.
	* real.c: Likewise.
	* recog.c: Likewise.
	* regclass.c: Likewise.
	* regmove.c: Likewise.
	* reg-stack.c: Likewise.
	* reload1.c: Likewise.
	* reload.c: Likewise.
	* resource.c: Likewise.
	* rtlanal.c: Likewise.
	* rtl.c: Likewise.
	* rtl-error.c: Likewise.

From-SVN: r53313
This commit is contained in:
Kazu Hirata 2002-05-09 01:42:28 +00:00 committed by Kazu Hirata
parent 461b48d544
commit a6a2274a17
13 changed files with 216 additions and 201 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
gcc/ChangeLog
View File

@ -1,3 +1,18 @@
2002-05-08 Kazu Hirata <kazu@cs.umass.edu>
* read-rtl.c: Fix formatting.
* real.c: Likewise.
* recog.c: Likewise.
* regclass.c: Likewise.
* regmove.c: Likewise.
* reg-stack.c: Likewise.
* reload1.c: Likewise.
* reload.c: Likewise.
* resource.c: Likewise.
* rtlanal.c: Likewise.
* rtl.c: Likewise.
* rtl-error.c: Likewise.
2002-05-08 John David Anglin <dave@hiauly1.hia.nrc.ca>
* pa/pa-64.h (MAX_WCHAR_TYPE_SIZE): Delete.

10
gcc/read-rtl.c
View File

@ -265,7 +265,7 @@ read_escape (ob, infile)
obstack_1grow (ob, c);
}
/* Read a double-quoted string onto the obstack. Caller has scanned
the leading quote. */
@ -325,7 +325,7 @@ read_braced_string (ob, infile)
obstack_1grow (ob, c);
}
obstack_1grow (ob, 0);
return obstack_finish (ob);
}
@ -361,7 +361,7 @@ read_string (ob, infile, star_if_braced)
}
else
fatal_with_file_and_line (infile, "expected `\"' or `{', found `%c'", c);
if (saw_paren)
{
c = read_skip_spaces (infile);
@ -639,7 +639,7 @@ again:
{
XVEC (return_rtx, i) = 0;
break;
}
}
/* Now process the vector. */
case 'E':
@ -694,7 +694,7 @@ again:
gets a star inserted as its first character, if it is
written with a brace block instead of a string constant. */
int star_if_braced = (format_ptr[-1] == 'T');
stringbuf = read_string (&rtl_obstack, infile, star_if_braced);
/* For insn patterns, we want to provide a default name

42
gcc/real.c
View File

@ -227,7 +227,7 @@ typedef unsigned int UHItype __attribute__ ((mode (HI)));
# define MINDECEXP -4956
#endif
/* Fail compilation if 2*NE is not the appropriate size.
/* Fail compilation if 2*NE is not the appropriate size.
If HOST_BITS_PER_WIDE_INT is 64, we're going to have padding
at the end of the array, because neither 96 nor 160 is
evenly divisible by 64. */
@ -1601,7 +1601,7 @@ eisnan (x)
for (i = 0; i < NE - 1; i++)
{
if (*x++ != 0)
return (1);
return (1);
}
#endif
@ -4321,13 +4321,13 @@ eifrac (x, i, frac)
*i = -(*i);
}
else
{
/* shift not more than 16 bits */
eshift (xi, k);
*i = (HOST_WIDE_INT) xi[M] & 0xffff;
if (xi[0])
*i = -(*i);
}
{
/* shift not more than 16 bits */
eshift (xi, k);
*i = (HOST_WIDE_INT) xi[M] & 0xffff;
if (xi[0])
*i = -(*i);
}
xi[0] = 0;
xi[E] = EXONE - 1;
xi[M] = 0;
@ -6021,11 +6021,11 @@ c4xtoe (d, e, mode)
y[M+1] = dn[1];
if (mode != QFmode) /* There are only 2 words in QFmode. */
{
{
y[M+2] = dn[2]; /* Fill in the rest of our mantissa. */
y[M+3] = dn[3];
size = 4;
}
}
else
size = 2;
eshift (y, -8);
@ -6034,7 +6034,7 @@ c4xtoe (d, e, mode)
carry = 1; /* Initially add 1 for the two's complement. */
for (i=size + M; i > M; i--)
{
{
if (carry && (y[i] == 0x0000))
/* We overflowed into the next word, carry is the same. */
y[i] = carry ? 0x0000 : 0xffff;
@ -6044,14 +6044,14 @@ c4xtoe (d, e, mode)
y[i] = ((~y[i]) + carry) & 0xffff;
carry = 0;
}
}
}
if (carry)
{
{
eshift (y, -1);
y[M+1] |= 0x8000;
r++;
}
}
y[1] = r + EXONE;
}
else
@ -6123,10 +6123,10 @@ toc4x (x, y, mode)
*y++ = 0x8000;
*y++ = 0x0000;
if (mode != QFmode)
{
*y++ = 0x0000;
*y++ = 0x0000;
}
{
*y++ = 0x0000;
*y++ = 0x0000;
}
return;
}
@ -6644,7 +6644,7 @@ etoudi (x, i)
}
else
{
/* shift not more than 16 bits */
/* shift not more than 16 bits */
eshift (xi, k);
noshift:
@ -6726,7 +6726,7 @@ etodi (x, i)
}
else
{
/* shift not more than 16 bits */
/* shift not more than 16 bits */
eshift (xi, k);
if (WORDS_BIG_ENDIAN)

44
gcc/recog.c
View File

@ -161,7 +161,7 @@ check_asm_operands (x)
c = constraints[c[0] - '0'];
if (! asm_operand_ok (operands[i], c))
return 0;
return 0;
}
return 1;
@ -227,11 +227,11 @@ validate_change (object, loc, new, in_group)
else
changes_allocated *= 2;
changes =
(change_t*) xrealloc (changes,
sizeof (change_t) * changes_allocated);
changes =
(change_t*) xrealloc (changes,
sizeof (change_t) * changes_allocated);
}
changes[num_changes].object = object;
changes[num_changes].loc = loc;
changes[num_changes].old = old;
@ -272,7 +272,7 @@ insn_invalid_p (insn)
? &num_clobbers : 0);
int is_asm = icode < 0 && asm_noperands (PATTERN (insn)) >= 0;
/* If this is an asm and the operand aren't legal, then fail. Likewise if
this is not an asm and the insn wasn't recognized. */
if ((is_asm && ! check_asm_operands (PATTERN (insn)))
@ -362,7 +362,7 @@ apply_change_group ()
int j;
newpat
= gen_rtx_PARALLEL (VOIDmode,
= gen_rtx_PARALLEL (VOIDmode,
rtvec_alloc (XVECLEN (pat, 0) - 1));
for (j = 0; j < XVECLEN (newpat, 0); j++)
XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j);
@ -401,7 +401,7 @@ apply_change_group ()
&& ((unsigned int)INSN_UID (changes[i].object)
< basic_block_for_insn->num_elements)
&& (bb = BLOCK_FOR_INSN (changes[i].object)))
bb->flags |= BB_DIRTY;
bb->flags |= BB_DIRTY;
num_changes = 0;
return 1;
@ -789,7 +789,7 @@ find_single_use_1 (dest, loc)
case MEM:
case SUBREG:
return find_single_use_1 (dest, &XEXP (x, 0));
default:
break;
}
@ -971,12 +971,12 @@ general_operand (op, mode)
/* Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory
may result in incorrect reference. We should simplify all valid
subregs of MEM anyway. But allow this after reload because we
might be called from cleanup_subreg_operands.
might be called from cleanup_subreg_operands.
??? This is a kludge. */
if (!reload_completed && SUBREG_BYTE (op) != 0
&& GET_CODE (SUBREG_REG (op)) == MEM)
return 0;
return 0;
op = SUBREG_REG (op);
code = GET_CODE (op);
@ -1329,7 +1329,7 @@ memory_address_p (mode, addr)
{
if (GET_CODE (addr) == ADDRESSOF)
return 1;
GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
return 0;
@ -1583,7 +1583,7 @@ decode_asm_operands (body, operands, operand_locs, constraints, modes)
{
if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
break; /* Past last SET */
if (operands)
operands[i] = SET_DEST (XVECEXP (body, 0, i));
if (operand_locs)
@ -1635,7 +1635,7 @@ decode_asm_operands (body, operands, operand_locs, constraints, modes)
return template;
}
/* Check if an asm_operand matches it's constraints.
/* Check if an asm_operand matches it's constraints.
Return > 0 if ok, = 0 if bad, < 0 if inconclusive. */
int
@ -1703,7 +1703,7 @@ asm_operand_ok (op, constraint)
if (GET_CODE (op) == MEM
&& (1
|| GET_CODE (XEXP (op, 0)) == PRE_DEC
|| GET_CODE (XEXP (op, 0)) == POST_DEC))
|| GET_CODE (XEXP (op, 0)) == POST_DEC))
return 1;
break;
@ -1711,7 +1711,7 @@ asm_operand_ok (op, constraint)
if (GET_CODE (op) == MEM
&& (1
|| GET_CODE (XEXP (op, 0)) == PRE_INC
|| GET_CODE (XEXP (op, 0)) == POST_INC))
|| GET_CODE (XEXP (op, 0)) == POST_INC))
return 1;
break;
@ -2215,7 +2215,7 @@ preprocess_constraints ()
break;
case '&':
op_alt[j].earlyclobber = 1;
break;
break;
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
@ -2264,7 +2264,7 @@ preprocess_constraints ()
}
}
}
/* Check the operands of an insn against the insn's operand constraints
and return 1 if they are valid.
The information about the insn's operands, constraints, operand modes
@ -2700,7 +2700,7 @@ split_insn (insn)
NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
/* ??? Coddle to md files that generate subregs in post-
reload splitters instead of computing the proper
reload splitters instead of computing the proper
hard register. */
if (reload_completed && first != last)
{
@ -2780,7 +2780,7 @@ split_all_insns (upd_life)
sbitmap_free (blocks);
}
/* Same as split_all_insns, but do not expect CFG to be available.
/* Same as split_all_insns, but do not expect CFG to be available.
Used by machine depedent reorg passes. */
void
@ -3131,7 +3131,7 @@ peephole2_optimize (dump_file)
if (i >= MAX_INSNS_PER_PEEP2 + 1)
i -= MAX_INSNS_PER_PEEP2 + 1;
note = find_reg_note (peep2_insn_data[i].insn,
note = find_reg_note (peep2_insn_data[i].insn,
REG_EH_REGION, NULL_RTX);
/* Replace the old sequence with the new. */
@ -3357,7 +3357,7 @@ if_test_bypass_p (out_insn, in_insn)
{
if (reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 1))
|| reg_mentioned_p (SET_DEST (out_set), XEXP (in_set, 2)))
return false;
return false;
}
else
{

76
gcc/reg-stack.c
View File

@ -188,7 +188,7 @@ typedef struct stack_def
unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
} *stack;
/* This is used to carry information about basic blocks. It is
/* This is used to carry information about basic blocks. It is
attached to the AUX field of the standard CFG block. */
typedef struct block_info_def
@ -211,7 +211,7 @@ enum emit_where
};
/* We use this array to cache info about insns, because otherwise we
spend too much time in stack_regs_mentioned_p.
spend too much time in stack_regs_mentioned_p.
Indexed by insn UIDs. A value of zero is uninitialized, one indicates
the insn uses stack registers, two indicates the insn does not use
@ -336,7 +336,7 @@ static rtx
next_flags_user (insn)
rtx insn;
{
/* Search forward looking for the first use of this value.
/* Search forward looking for the first use of this value.
Stop at block boundaries. */
while (insn != current_block->end)
@ -344,7 +344,7 @@ next_flags_user (insn)
insn = NEXT_INSN (insn);
if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
return insn;
return insn;
if (GET_CODE (insn) == CALL_INSN)
return NULL_RTX;
@ -374,7 +374,7 @@ straighten_stack (insn, regstack)
for (top = temp_stack.top = regstack->top; top >= 0; top--)
temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
}
@ -439,7 +439,7 @@ reg_to_stack (first, file)
if (i > LAST_STACK_REG)
return;
/* Ok, floating point instructions exist. If not optimizing,
/* Ok, floating point instructions exist. If not optimizing,
build the CFG and run life analysis. */
if (!optimize)
{
@ -477,7 +477,7 @@ reg_to_stack (first, file)
ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
/* A QNaN for initializing uninitialized variables.
/* A QNaN for initializing uninitialized variables.
??? We can't load from constant memory in PIC mode, because
we're insertting these instructions before the prologue and
@ -677,7 +677,7 @@ check_asm_stack_operands (insn)
error_for_asm (insn, "output constraint %d must specify a single register", i);
malformed_asm = 1;
}
else
else
{
int j;
@ -823,7 +823,7 @@ stack_result (decl)
{
#ifdef FUNCTION_OUTGOING_VALUE
result
= FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
= FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
#else
result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
#endif
@ -932,9 +932,9 @@ emit_pop_insn (insn, regstack, reg, where)
pop_insn = NULL_RTX;
if (get_hard_regnum (regstack, reg1) >= 0)
pop_insn = emit_pop_insn (insn, regstack, reg1, where);
pop_insn = emit_pop_insn (insn, regstack, reg1, where);
if (get_hard_regnum (regstack, reg2) >= 0)
pop_insn = emit_pop_insn (insn, regstack, reg2, where);
pop_insn = emit_pop_insn (insn, regstack, reg2, where);
if (!pop_insn)
abort ();
return pop_insn;
@ -1264,7 +1264,7 @@ swap_rtx_condition (insn)
{
rtx dest = SET_DEST (pat);
/* Search forward looking for the first use of this value.
/* Search forward looking for the first use of this value.
Stop at block boundaries. */
while (insn != current_block->end)
{
@ -1430,12 +1430,12 @@ subst_stack_regs_pat (insn, regstack, pat)
/* Deaths in USE insns can happen in non optimizing compilation.
Handle them by popping the dying register. */
src = get_true_reg (&XEXP (pat, 0));
if (STACK_REG_P (*src)
&& find_regno_note (insn, REG_DEAD, REGNO (*src)))
{
emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
return;
}
if (STACK_REG_P (*src)
&& find_regno_note (insn, REG_DEAD, REGNO (*src)))
{
emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
return;
}
/* ??? Uninitialized USE should not happen. */
else if (get_hard_regnum (regstack, *src) == -1)
abort ();
@ -1455,7 +1455,7 @@ subst_stack_regs_pat (insn, regstack, pat)
/* The fix_truncdi_1 pattern wants to be able to allocate
it's own scratch register. It does this by clobbering
an fp reg so that it is assured of an empty reg-stack
register. If the register is live, kill it now.
register. If the register is live, kill it now.
Remove the DEAD/UNUSED note so we don't try to kill it
later too. */
@ -1474,7 +1474,7 @@ subst_stack_regs_pat (insn, regstack, pat)
{
/* A top-level clobber with no REG_DEAD, and no hard-regnum
indicates an uninitialized value. Because reload removed
all other clobbers, this must be due to a function
all other clobbers, this must be due to a function
returning without a value. Load up a NaN. */
if (! note
@ -1798,7 +1798,7 @@ subst_stack_regs_pat (insn, regstack, pat)
reversed_comparison_code (XEXP (pat_src, 0), insn));
}
else
emit_swap_insn (insn, regstack, *dest);
emit_swap_insn (insn, regstack, *dest);
}
{
@ -1837,7 +1837,7 @@ subst_stack_regs_pat (insn, regstack, pat)
/* Make dest the top of stack. Add dest to regstack if
not present. */
if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
regstack->reg[++regstack->top] = REGNO (*dest);
regstack->reg[++regstack->top] = REGNO (*dest);
SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
replace_reg (dest, FIRST_STACK_REG);
break;
@ -1899,7 +1899,7 @@ subst_asm_stack_regs (insn, regstack)
n_inputs = get_asm_operand_n_inputs (body);
n_outputs = recog_data.n_operands - n_inputs;
if (alt < 0)
abort ();
@ -2296,7 +2296,7 @@ change_stack (insn, old, new, where)
abort ();
/* If the stack is not empty (new->top != -1), loop here emitting
swaps until the stack is correct.
swaps until the stack is correct.
The worst case number of swaps emitted is N + 2, where N is the
depth of the stack. In some cases, the reg at the top of
@ -2372,7 +2372,7 @@ print_stack (file, s)
}
/* This function was doing life analysis. We now let the regular live
code do it's job, so we only need to check some extra invariants
code do it's job, so we only need to check some extra invariants
that reg-stack expects. Primary among these being that all registers
are initialized before use.
@ -2390,10 +2390,10 @@ convert_regs_entry ()
basic_block block = BASIC_BLOCK (i);
block_info bi = BLOCK_INFO (block);
int reg;
/* Set current register status at last instruction `uninitialized'. */
bi->stack_in.top = -2;
/* Copy live_at_end and live_at_start into temporaries. */
for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
{
@ -2404,11 +2404,11 @@ convert_regs_entry ()
}
}
/* Load something into each stack register live at function entry.
/* Load something into each stack register live at function entry.
Such live registers can be caused by uninitialized variables or
functions not returning values on all paths. In order to keep
functions not returning values on all paths. In order to keep
the push/pop code happy, and to not scrog the register stack, we
must put something in these registers. Use a QNaN.
must put something in these registers. Use a QNaN.
Note that we are insertting converted code here. This code is
never seen by the convert_regs pass. */
@ -2510,7 +2510,7 @@ compensate_edge (e, file)
tmpstack = regstack;
change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
return false;
return false;
}
if (file)
@ -2593,8 +2593,8 @@ compensate_edge (e, file)
current_block = NULL;
start_sequence ();
/* ??? change_stack needs some point to emit insns after.
Also needed to keep gen_sequence from returning a
/* ??? change_stack needs some point to emit insns after.
Also needed to keep gen_sequence from returning a
pattern as opposed to a sequence, which would lose
REG_DEAD notes. */
after = emit_note (NULL, NOTE_INSN_DELETED);
@ -2660,7 +2660,7 @@ convert_regs_1 (file, block)
inserted |= compensate_edge (beste, file);
else
beste = NULL;
current_block = block;
if (file)
@ -2753,7 +2753,7 @@ convert_regs_1 (file, block)
if (!BLOCK_INFO (e->dest)->done
&& e->dest != block)
abort ();
inserted |= compensate_edge (e, file);
inserted |= compensate_edge (e, file);
}
}
for (e = block->pred; e ; e = e->pred_next)
@ -2763,7 +2763,7 @@ convert_regs_1 (file, block)
{
if (!BLOCK_INFO (e->src)->done)
abort ();
inserted |= compensate_edge (e, file);
inserted |= compensate_edge (e, file);
}
}
@ -2832,8 +2832,8 @@ convert_regs (file)
/* Process all blocks reachable from all entry points. */
for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
inserted |= convert_regs_2 (file, e->dest);
/* ??? Process all unreachable blocks. Though there's no excuse
/* ??? Process all unreachable blocks. Though there's no excuse
for keeping these even when not optimizing. */
for (i = 0; i < n_basic_blocks; ++i)
{

66
gcc/regclass.c
View File

@ -97,13 +97,13 @@ static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
/* This is much like call_used_regs, except it doesn't have to
be a superset of FIXED_REGISTERS. This vector indicates
what is really call clobbered, and is used when defining
what is really call clobbered, and is used when defining
regs_invalidated_by_call. */
#ifdef CALL_REALLY_USED_REGISTERS
char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
#endif
/* Indexed by hard register number, contains 1 for registers that are
fixed use or call used registers that cannot hold quantities across
calls even if we are willing to save and restore them. call fixed
@ -155,7 +155,7 @@ HARD_REG_SET reg_class_contents[N_REG_CLASSES];
#define N_REG_INTS \
((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
= REG_CLASS_CONTENTS;
/* For each reg class, number of regs it contains. */
@ -458,7 +458,7 @@ init_reg_sets_1 ()
RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
If we are generating PIC code, the PIC offset table register is
preserved across calls, though the target can override that. */
if (i == STACK_POINTER_REGNUM || i == FRAME_POINTER_REGNUM)
;
#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
@ -558,7 +558,7 @@ init_reg_sets_1 ()
{
HARD_REG_SET c;
COMPL_HARD_REG_SET (c, reg_class_contents[CLASS_CANNOT_CHANGE_MODE]);
for (i = 0; i < N_REG_CLASSES; i++)
{
GO_IF_HARD_REG_SUBSET (reg_class_contents[i], c, ok_class);
@ -774,8 +774,8 @@ fix_register (name, fixed, call_used)
static const char * const what_option[2][2] = {
{ "call-saved", "call-used" },
{ "no-such-option", "fixed" }};
error ("can't use '%s' as a %s register", name,
error ("can't use '%s' as a %s register", name,
what_option[fixed][call_used]);
}
else
@ -882,7 +882,7 @@ static void dump_regclass PARAMS ((FILE *));
static void record_reg_classes PARAMS ((int, int, rtx *, enum machine_mode *,
const char **, rtx,
struct costs *, struct reg_pref *));
static int copy_cost PARAMS ((rtx, enum machine_mode,
static int copy_cost PARAMS ((rtx, enum machine_mode,
enum reg_class, int));
static void record_address_regs PARAMS ((rtx, enum reg_class, int));
#ifdef FORBIDDEN_INC_DEC_CLASSES
@ -987,7 +987,7 @@ record_operand_costs (insn, op_costs, reg_pref)
Then handle any address registers. Finally record the desired
classes for any pseudos, doing it twice if some pair of
operands are commutative. */
for (i = 0; i < recog_data.n_operands; i++)
{
op_costs[i] = init_cost;
@ -1030,12 +1030,12 @@ record_operand_costs (insn, op_costs, reg_pref)
xconstraints[i] = constraints[i+1];
xconstraints[i+1] = constraints[i];
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
recog_data.operand, modes,
recog_data.operand, modes,
xconstraints, insn, op_costs, reg_pref);
}
record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
recog_data.operand, modes,
recog_data.operand, modes,
constraints, insn, op_costs, reg_pref);
}
@ -1193,7 +1193,7 @@ regclass (f, nregs, dump)
#ifdef CLASS_CANNOT_CHANGE_MODE
reg_changes_mode = BITMAP_XMALLOC ();
#endif
#endif
#ifdef FORBIDDEN_INC_DEC_CLASSES
@ -1258,7 +1258,7 @@ regclass (f, nregs, dump)
int index;
if (dump)
fprintf (dump, "\n\nPass %i\n\n",pass);
fprintf (dump, "\n\nPass %i\n\n",pass);
/* Zero out our accumulation of the cost of each class for each reg. */
memset ((char *) costs, 0, nregs * sizeof (struct costs));
@ -1277,7 +1277,7 @@ regclass (f, nregs, dump)
insn = scan_one_insn (insn, pass);
}
else
for (index = 0; index < n_basic_blocks; index++)
for (index = 0; index < n_basic_blocks; index++)
{
basic_block bb = BASIC_BLOCK (index);
@ -1293,17 +1293,17 @@ regclass (f, nregs, dump)
break;
}
}
/* Now for each register look at how desirable each class is
and find which class is preferred. Store that in
`prefclass'. Record in `altclass' the largest register
class any of whose registers is better than memory. */
if (pass == 0)
reg_pref = reg_pref_buffer;
if (dump)
{
{
dump_regclass (dump);
fprintf (dump,"\n");
}
@ -1365,12 +1365,12 @@ regclass (f, nregs, dump)
#endif
)
alt = reg_class_subunion[(int) alt][class];
/* If we don't add any classes, nothing to try. */
if (alt == best)
alt = NO_REGS;
if (dump
if (dump
&& (reg_pref[i].prefclass != (int) best
|| reg_pref[i].altclass != (int) alt))
{
@ -1418,7 +1418,7 @@ regclass (f, nregs, dump)
This procedure works alternative by alternative. For each alternative
we assume that we will be able to allocate all pseudos to their ideal
register class and calculate the cost of using that alternative. Then
we compute for each operand that is a pseudo-register, the cost of
we compute for each operand that is a pseudo-register, the cost of
having the pseudo allocated to each register class and using it in that
alternative. To this cost is added the cost of the alternative.
@ -1466,7 +1466,7 @@ record_reg_classes (n_alts, n_ops, ops, modes,
classes[i] = NO_REGS;
allows_mem[i] = 0;
/* If this operand has no constraints at all, we can conclude
/* If this operand has no constraints at all, we can conclude
nothing about it since anything is valid. */
if (*p == 0)
@ -1512,7 +1512,7 @@ record_reg_classes (n_alts, n_ops, ops, modes,
|| REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
{
/* This op is a pseudo but the one it matches is not. */
/* If we can't put the other operand into a register, this
alternative can't be used. */
@ -1543,7 +1543,7 @@ record_reg_classes (n_alts, n_ops, ops, modes,
+ (recog_data.operand_type[i] != OP_IN
? may_move_out_cost[mode][(int) classes[i]][class]
: 0));
/* If the alternative actually allows memory, make things
a bit cheaper since we won't need an extra insn to
load it. */
@ -1726,7 +1726,7 @@ record_reg_classes (n_alts, n_ops, ops, modes,
{
/* We must always fail if the operand is a REG, but
we did not find a suitable class.
Otherwise we may perform an uninitialized read
from this_op_costs after the `continue' statement
below. */
@ -1826,7 +1826,7 @@ record_reg_classes (n_alts, n_ops, ops, modes,
and one operand is a pseudo with the other a hard reg or a pseudo
that prefers a register that is in its own register class then
we may want to adjust the cost of that register class to -1.
Avoid the adjustment if the source does not die to avoid stressing of
register allocator by preferrencing two coliding registers into single
class.
@ -1906,7 +1906,7 @@ copy_cost (x, mode, class, to_p)
class = PREFERRED_RELOAD_CLASS (x, class);
#ifdef HAVE_SECONDARY_RELOADS
/* If we need a secondary reload (we assume here that we are using
/* If we need a secondary reload (we assume here that we are using
the secondary reload as an intermediate, not a scratch register), the
cost is that to load the input into the intermediate register, then
to copy them. We use a special value of TO_P to avoid recursion. */
@ -2001,7 +2001,7 @@ record_address_regs (x, class, scale)
/* If index and base registers are the same on this machine, just
record registers in any non-constant operands. We assume here,
as well as in the tests below, that all addresses are in
as well as in the tests below, that all addresses are in
canonical form. */
else if (INDEX_REG_CLASS == MODE_BASE_REG_CLASS (VOIDmode))
@ -2192,7 +2192,7 @@ allocate_reg_info (num_regs, new_p, renumber_p)
{
VARRAY_REG_INIT (reg_n_info, regno_allocated, "reg_n_info");
renumber = (short *) xmalloc (size_renumber);
reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
* sizeof (struct reg_pref));
}
@ -2205,7 +2205,7 @@ allocate_reg_info (num_regs, new_p, renumber_p)
free ((char *) renumber);
free ((char *) reg_pref);
renumber = (short *) xmalloc (size_renumber);
reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
reg_pref_buffer = (struct reg_pref *) xmalloc (regno_allocated
* sizeof (struct reg_pref));
}
@ -2213,7 +2213,7 @@ allocate_reg_info (num_regs, new_p, renumber_p)
{
renumber = (short *) xrealloc ((char *) renumber, size_renumber);
reg_pref_buffer = (struct reg_pref *) xrealloc ((char *) reg_pref_buffer,
regno_allocated
regno_allocated
* sizeof (struct reg_pref));
}
}
@ -2232,7 +2232,7 @@ allocate_reg_info (num_regs, new_p, renumber_p)
{
/* Loop through each of the segments allocated for the actual
reg_info pages, and set up the pointers, zero the pages, etc. */
for (reg_data = reg_info_head;
for (reg_data = reg_info_head;
reg_data && reg_data->max_index >= min;
reg_data = reg_data->next)
{
@ -2318,7 +2318,7 @@ free_reg_info ()
int max_parallel;
/* Used as a temporary to record the largest number of registers in
/* Used as a temporary to record the largest number of registers in
PARALLEL in a SET_DEST. This is added to max_parallel. */
static int max_set_parallel;
@ -2467,7 +2467,7 @@ reg_scan_mark_refs (x, insn, note_flag, min_regno)
Likewise if it is setting the destination from an address or from a
value equivalent to an address or to the sum of an address and
something else.
But don't do any of this if the pseudo corresponds to a user
variable since it should have already been set as a pointer based
on the type. */

26
gcc/regmove.c
View File

@ -269,7 +269,7 @@ mark_flags_life_zones (flags)
{
int i;
for (i = 0; i < flags_nregs; ++i)
live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
flags_regno + i);
}
#endif
@ -950,7 +950,7 @@ fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
if (perhaps_ends_bb_p (p))
break;
else if (! INSN_P (p))
continue;
continue;
if (find_regno_note (p, REG_DEAD, REGNO (dst)))
dst_death = p;
@ -962,7 +962,7 @@ fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
&& GET_CODE (SET_SRC (pset)) == PLUS
&& XEXP (SET_SRC (pset), 0) == src
&& GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
{
{
HOST_WIDE_INT newconst
= INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
@ -1013,10 +1013,10 @@ fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
#endif
return 1;
}
}
}
if (reg_set_p (dst, PATTERN (p)))
break;
break;
/* If we have passed a call instruction, and the
pseudo-reg SRC is not already live across a call,
@ -1025,19 +1025,19 @@ fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
hard regs are clobbered. Thus, we only use it for src for
non-call insns. */
if (GET_CODE (p) == CALL_INSN)
{
{
if (! dst_death)
num_calls++;
if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
break;
if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
break;
if (call_used_regs [REGNO (dst)]
|| find_reg_fusage (p, CLOBBER, dst))
break;
}
}
else if (reg_set_p (src, PATTERN (p)))
break;
break;
}
return 0;
@ -1131,8 +1131,8 @@ regmove_optimize (f, nregs, regmove_dump_file)
}
}
}
if (! flag_regmove)
continue;
if (! flag_regmove)
continue;
if (! find_matches (insn, &match))
continue;
@ -1370,7 +1370,7 @@ regmove_optimize (f, nregs, regmove_dump_file)
it for this optimization, as this would make it
no longer equivalent to a constant. */
if (reg_is_remote_constant_p (src, insn, f))
if (reg_is_remote_constant_p (src, insn, f))
{
if (!copy_src)
{

4
gcc/reload.c
View File

@ -3563,7 +3563,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
for (i = 0; i < noperands; i++)
goal_alternative_matched[i] = -1;
for (i = 0; i < noperands; i++)
if (! goal_alternative_win[i]
&& goal_alternative_matches[i] >= 0)
@ -6824,7 +6824,7 @@ regno_clobbered_p (regno, insn, mode, sets)
&& GET_CODE (XEXP (elt, 0)) == REG)
{
unsigned int test = REGNO (XEXP (elt, 0));
if (test >= regno && test < endregno)
return 1;
}

14
gcc/reload1.c
View File

@ -5746,8 +5746,8 @@ choose_reload_regs (chain)
/* If we found an equivalent reg, say no code need be generated
to load it, and use it as our reload reg. */
if (equiv != 0
&& (regno != HARD_FRAME_POINTER_REGNUM
if (equiv != 0
&& (regno != HARD_FRAME_POINTER_REGNUM
|| !frame_pointer_needed))
{
int nr = HARD_REGNO_NREGS (regno, rld[r].mode);
@ -6611,7 +6611,7 @@ emit_input_reload_insns (chain, rl, old, j)
/* End this sequence. */
*where = get_insns ();
end_sequence ();
/* Update reload_override_in so that delete_address_reloads_1
can see the actual register usage. */
if (oldequiv_reg)
@ -8223,7 +8223,7 @@ reload_cse_simplify_set (set, insn)
#ifdef LOAD_EXTEND_OP
/* When replacing a memory with a register, we need to honor assumptions
that combine made wrt the contents of sign bits. We'll do this by
generating an extend instruction instead of a reg->reg copy. Thus
generating an extend instruction instead of a reg->reg copy. Thus
the destination must be a register that we can widen. */
if (GET_CODE (src) == MEM
&& GET_MODE_BITSIZE (GET_MODE (src)) < BITS_PER_WORD
@ -9388,7 +9388,7 @@ move2add_note_store (dst, set, data)
reg_set_luid[regno] = move2add_last_label_luid + 1;
reg_mode[regno] = mode;
return;
default:
invalidate:
/* Invalidate the contents of the register. */
@ -9474,7 +9474,7 @@ copy_eh_notes (insn, x)
for (; x != 0; x = NEXT_INSN (x))
{
if (may_trap_p (PATTERN (x)))
REG_NOTES (x)
REG_NOTES (x)
= gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
REG_NOTES (x));
}
@ -9485,7 +9485,7 @@ copy_eh_notes (insn, x)
abnormal calls moving basic block end, but in fact it wants to emit
them on the edge. Looks for abnormal call edges, find backward the
proper call and fix the damage.
Similar handle instructions throwing exceptions internally. */
void
fixup_abnormal_edges ()

26
gcc/resource.c
View File

@ -1,5 +1,5 @@
/* Definitions for computing resource usage of specific insns.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GCC.
@ -281,7 +281,7 @@ mark_referenced_resources (x, res, include_delayed_effects)
We can not just fall through here since then we would be confused
by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
traditional asms unlike their normal usage. */
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
return;
@ -423,7 +423,7 @@ mark_referenced_resources (x, res, include_delayed_effects)
}
/* A subroutine of mark_target_live_regs. Search forward from TARGET
looking for registers that are set before they are used. These are dead.
looking for registers that are set before they are used. These are dead.
Stop after passing a few conditional jumps, and/or a small
number of unconditional branches. */
@ -721,7 +721,7 @@ mark_set_resources (x, res, in_dest, mark_type)
case CLOBBER:
mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
return;
case SEQUENCE:
for (i = 0; i < XVECLEN (x, 0); i++)
if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
@ -821,7 +821,7 @@ mark_set_resources (x, res, in_dest, mark_type)
We can not just fall through here since then we would be confused
by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
traditional asms unlike their normal usage. */
for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
MARK_SRC_DEST);
@ -946,7 +946,7 @@ mark_target_live_regs (insns, target, res)
}
else
{
/* Allocate a place to put our results and chain it into the
/* Allocate a place to put our results and chain it into the
hash table. */
tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
tinfo->uid = INSN_UID (target);
@ -1056,7 +1056,7 @@ mark_target_live_regs (insns, target, res)
= (first_regno
+ HARD_REGNO_NREGS (first_regno,
GET_MODE (XEXP (link, 0))));
for (i = first_regno; i < last_regno; i++)
SET_HARD_REG_BIT (pending_dead_regs, i);
}
@ -1075,7 +1075,7 @@ mark_target_live_regs (insns, target, res)
= (first_regno
+ HARD_REGNO_NREGS (first_regno,
GET_MODE (XEXP (link, 0))));
for (i = first_regno; i < last_regno; i++)
CLEAR_HARD_REG_BIT (current_live_regs, i);
}
@ -1093,7 +1093,7 @@ mark_target_live_regs (insns, target, res)
RTL chain when there are no epilogue insns. Certain resources
are implicitly required at that point. */
else if (GET_CODE (real_insn) == NOTE
&& NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
&& NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
}
@ -1237,12 +1237,12 @@ free_resource_info ()
if (target_hash_table != NULL)
{
int i;
for (i = 0; i < TARGET_HASH_PRIME; ++i)
for (i = 0; i < TARGET_HASH_PRIME; ++i)
{
struct target_info *ti = target_hash_table[i];
while (ti)
while (ti)
{
struct target_info *next = ti->next;
free (ti);
@ -1268,7 +1268,7 @@ clear_hashed_info_for_insn (insn)
rtx insn;
{
struct target_info *tinfo;
if (target_hash_table != NULL)
{
for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];

4
gcc/rtl-error.c
View File

@ -1,5 +1,5 @@
/* RTL specific diagnostic subroutines for the GNU C compiler
Copyright (C) 2001 Free Software Foundation, Inc.
Copyright (C) 2001, 2002 Free Software Foundation, Inc.
Contributed by Gabriel Dos Reis <gdr@codesourcery.com>
This file is part of GCC.
@ -84,7 +84,7 @@ diagnostic_for_asm (insn, msg, args_ptr, warn)
set_diagnostic_context (&dc, msg, args_ptr, NULL, 0, warn);
file_and_line_for_asm (insn, &diagnostic_file_location (&dc),
&diagnostic_line_location (&dc));
&diagnostic_line_location (&dc));
report_diagnostic (&dc);
}

2
gcc/rtl.c
View File

@ -417,7 +417,7 @@ get_mode_alignment (mode)
alignment = GET_MODE_UNIT_SIZE (mode);
else
alignment = GET_MODE_SIZE (mode);
/* Extract the LSB of the size. */
alignment = alignment & -alignment;
alignment *= BITS_PER_UNIT;

88
gcc/rtlanal.c
View File

@ -176,7 +176,7 @@ rtx_varies_p (x, for_alias)
during alias analysis. */
return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias))
|| rtx_varies_p (XEXP (x, 1), for_alias);
case ASM_OPERANDS:
if (MEM_VOLATILE_P (x))
return 1;
@ -265,9 +265,9 @@ rtx_addr_can_trap_p (x)
return 1;
}
/* Return 1 if X refers to a memory location whose address
/* Return 1 if X refers to a memory location whose address
cannot be compared reliably with constant addresses,
or if X refers to a BLKmode memory object.
or if X refers to a BLKmode memory object.
FOR_ALIAS is nonzero if we are called from alias analysis; if it is
zero, we are slightly more conservative. */
@ -553,9 +553,9 @@ global_reg_mentioned_p (x)
x = CALL_INSN_FUNCTION_USAGE (x);
if (x == 0)
return 0;
}
}
else
x = PATTERN (x);
x = PATTERN (x);
}
return for_each_rtx (&x, global_reg_mentioned_p_1, NULL);
@ -668,7 +668,7 @@ reg_mentioned_p (reg, in)
case CONST_DOUBLE:
/* These are kept unique for a given value. */
return 0;
default:
break;
}
@ -808,7 +808,7 @@ reg_referenced_p (x, body)
if (reg_referenced_p (x, XVECEXP (body, 0, i)))
return 1;
return 0;
case CLOBBER:
if (GET_CODE (XEXP (body, 0)) == MEM)
if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
@ -923,7 +923,7 @@ regs_set_between_p (x, start, end)
case REG:
return reg_set_between_p (x, start, end);
default:
break;
}
@ -979,7 +979,7 @@ modified_between_p (x, start, end)
case REG:
return reg_set_between_p (x, start, end);
default:
break;
}
@ -1190,7 +1190,7 @@ multiple_sets (insn)
{
int found;
int i;
/* INSN must be an insn. */
if (! INSN_P (insn))
return 0;
@ -1208,7 +1208,7 @@ multiple_sets (insn)
found = 1;
}
}
/* Either zero or one SET. */
return 0;
}
@ -1340,14 +1340,14 @@ find_last_value (x, pinsn, valid_to, allow_hwreg)
return src;
}
}
/* If set in non-simple way, we don't have a value. */
if (reg_set_p (x, p))
break;
}
return x;
}
}
/* Return nonzero if register in range [REGNO, ENDREGNO)
appears either explicitly or implicitly in X
@ -1392,7 +1392,7 @@ refers_to_regno_p (regno, endregno, x, loc)
return 1;
return (endregno > x_regno
&& regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER
&& regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER
? HARD_REGNO_NREGS (x_regno, GET_MODE (x))
: 1));
@ -1597,7 +1597,7 @@ reg_set_last (x, insn)
If the item being stored in or clobbered is a SUBREG of a hard register,
the SUBREG will be passed. */
void
note_stores (x, fun, data)
rtx x;
@ -1795,7 +1795,7 @@ dead_or_set_regno_p (insn, test_regno)
if (GET_CODE (pattern) == SET)
{
rtx dest = SET_DEST (PATTERN (insn));
/* A value is totally replaced if it is the destination or the
destination is a SUBREG of REGNO that does not change the number of
words in it. */
@ -1946,11 +1946,11 @@ find_reg_fusage (insn, code, datum)
rtx link;
for (link = CALL_INSN_FUNCTION_USAGE (insn);
link;
link;
link = XEXP (link, 1))
if (GET_CODE (XEXP (link, 0)) == code
if (GET_CODE (XEXP (link, 0)) == code
&& rtx_equal_p (datum, XEXP (XEXP (link, 0), 0)))
return 1;
return 1;
}
else
{
@ -1960,7 +1960,7 @@ find_reg_fusage (insn, code, datum)
to pseudo registers, so don't bother checking. */
if (regno < FIRST_PSEUDO_REGISTER)
{
{
unsigned int end_regno
= regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
unsigned int i;
@ -1968,7 +1968,7 @@ find_reg_fusage (insn, code, datum)
for (i = regno; i < end_regno; i++)
if (find_regno_fusage (insn, code, i))
return 1;
}
}
}
return 0;
@ -2158,7 +2158,7 @@ volatile_insn_p (x)
{
const char *fmt = GET_RTX_FORMAT (code);
int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
@ -2225,7 +2225,7 @@ volatile_refs_p (x)
{
const char *fmt = GET_RTX_FORMAT (code);
int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
@ -2303,7 +2303,7 @@ side_effects_p (x)
{
const char *fmt = GET_RTX_FORMAT (code);
int i;
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
@ -2469,7 +2469,7 @@ inequality_comparisons_p (x)
case GE:
case GEU:
return 1;
default:
break;
}
@ -2492,7 +2492,7 @@ inequality_comparisons_p (x)
return 1;
}
}
return 0;
}
@ -2566,12 +2566,12 @@ replace_rtx (x, from, to)
}
return x;
}
}
/* Throughout the rtx X, replace many registers according to REG_MAP.
Return the replacement for X (which may be X with altered contents).
REG_MAP[R] is the replacement for register R, or 0 for don't replace.
NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
We only support REG_MAP entries of REG or SUBREG. Also, hard registers
should not be mapped to pseudos or vice versa since validate_change
@ -2629,7 +2629,7 @@ replace_regs (x, reg_map, nregs, replace_dest)
{
rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
return simplify_gen_subreg (GET_MODE (x), map_val,
GET_MODE (SUBREG_REG (x)),
GET_MODE (SUBREG_REG (x)),
SUBREG_BYTE (x));
}
break;
@ -2651,7 +2651,7 @@ replace_regs (x, reg_map, nregs, replace_dest)
SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
return x;
default:
break;
}
@ -2808,9 +2808,9 @@ for_each_rtx (x, f, data)
length = GET_RTX_LENGTH (GET_CODE (*x));
format = GET_RTX_FORMAT (GET_CODE (*x));
for (i = 0; i < length; ++i)
for (i = 0; i < length; ++i)
{
switch (format[i])
switch (format[i])
{
case 'e':
result = for_each_rtx (&XEXP (*x, i), f, data);
@ -2820,7 +2820,7 @@ for_each_rtx (x, f, data)
case 'V':
case 'E':
if (XVEC (*x, i) != 0)
if (XVEC (*x, i) != 0)
{
int j;
for (j = 0; j < XVECLEN (*x, i); ++j)
@ -2830,7 +2830,7 @@ for_each_rtx (x, f, data)
return result;
}
}
break;
break;
default:
/* Nothing to do. */
@ -2950,8 +2950,8 @@ auto_inc_p (x)
to and including TO is safe to move. If NEW_TO is non-NULL, and
the sequence is not already safe to move, but can be easily
extended to a sequence which is safe, then NEW_TO will point to the
end of the extended sequence.
end of the extended sequence.
For now, this function only checks that the region contains whole
exception regions, but it could be extended to check additional
conditions as well. */
@ -3006,7 +3006,7 @@ insns_safe_to_move_p (from, to, new_to)
/* It's OK to move the sequence if there were matched sets of
exception region notes. */
return eh_region_count == 0;
past_to_p = 1;
}
@ -3021,7 +3021,7 @@ insns_safe_to_move_p (from, to, new_to)
/* Go to the next instruction. */
r = NEXT_INSN (r);
}
return 0;
}
@ -3118,7 +3118,7 @@ subreg_regno_offset (xregno, xmode, offset, ymode)
nregs_ymode = HARD_REGNO_NREGS (xregno, ymode);
if (offset == 0 || nregs_xmode == nregs_ymode)
return 0;
/* size of ymode must not be greater than the size of xmode. */
mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
if (mode_multiple == 0)
@ -3130,7 +3130,7 @@ subreg_regno_offset (xregno, xmode, offset, ymode)
}
/* Return the final regno that a subreg expression refers to. */
unsigned int
unsigned int
subreg_regno (x)
rtx x;
{
@ -3138,8 +3138,8 @@ subreg_regno (x)
rtx subreg = SUBREG_REG (x);
int regno = REGNO (subreg);
ret = regno + subreg_regno_offset (regno,
GET_MODE (subreg),
ret = regno + subreg_regno_offset (regno,
GET_MODE (subreg),
SUBREG_BYTE (x),
GET_MODE (x));
return ret;
@ -3166,7 +3166,7 @@ parms_set (x, pat, data)
}
}
/* Look backward for first parameter to be loaded.
/* Look backward for first parameter to be loaded.
Do not skip BOUNDARY. */
rtx
find_first_parameter_load (call_insn, boundary)
@ -3219,7 +3219,7 @@ find_first_parameter_load (call_insn, boundary)
}
if (INSN_P (before))
note_stores (PATTERN (before), parms_set, &parm);
note_stores (PATTERN (before), parms_set, &parm);
}
return before;
}