altivec.md (altivec_lve<VI_char>x): Replace define_insn with define_expand and new define_insn...
gcc: 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace define_insn with define_expand and new define_insn *altivec_lve<VI_char>x_internal. (altivec_stve<VI_char>x): Replace define_insn with define_expand and new define_insn *altivec_stve<VI_char>x_internal. * config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New prototype. * config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by lve*x built-ins. (altivec_expand_stvex_be): New function. gcc/testsuite: 2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.dg/vmx/lde.c: New test. * gcc.dg/vmx/lde-be-order.c: New test. * gcc.dg/vmx/ste.c: New test. * gcc.dg/vmx/ste-be-order.c: New test. From-SVN: r208049
This commit is contained in:
Bill Schmidt
William Schmidt
parent
e5e216f98b
commit
a6eecdc172
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@ -1,3 +1,16 @@
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2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/altivec.md (altivec_lve<VI_char>x): Replace
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define_insn with define_expand and new define_insn
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*altivec_lve<VI_char>x_internal.
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(altivec_stve<VI_char>x): Replace define_insn with define_expand
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and new define_insn *altivec_stve<VI_char>x_internal.
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* config/rs6000/rs6000-protos.h (altivec_expand_stvex_be): New
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prototype.
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* config/rs6000/rs6000.c (altivec_expand_lvx_be): Document use by
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lve*x built-ins.
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(altivec_expand_stvex_be): New function.
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2014-02-22 Joern Rennecke <joern.rennecke@embecosm.com>
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* config/avr/avr.c (avr_can_eliminate): Allow elimination from
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@ -2325,7 +2325,21 @@
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;; Parallel some of the LVE* and STV*'s with unspecs because some have
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;; identical rtl but different instructions-- and gcc gets confused.
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(define_insn "altivec_lve<VI_char>x"
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(define_expand "altivec_lve<VI_char>x"
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[(parallel
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[(set (match_operand:VI 0 "register_operand" "=v")
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(match_operand:VI 1 "memory_operand" "Z"))
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(unspec [(const_int 0)] UNSPEC_LVE)])]
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"TARGET_ALTIVEC"
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{
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if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)
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{
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altivec_expand_lvx_be (operands[0], operands[1], <MODE>mode, UNSPEC_LVE);
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DONE;
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}
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})
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(define_insn "*altivec_lve<VI_char>x_internal"
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[(parallel
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[(set (match_operand:VI 0 "register_operand" "=v")
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(match_operand:VI 1 "memory_operand" "Z"))
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@ -2435,7 +2449,19 @@
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"stvxl %1,%y0"
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[(set_attr "type" "vecstore")])
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(define_insn "altivec_stve<VI_char>x"
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(define_expand "altivec_stve<VI_char>x"
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[(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")
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(unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]
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"TARGET_ALTIVEC"
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{
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if (!BYTES_BIG_ENDIAN && VECTOR_ELT_ORDER_BIG)
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{
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altivec_expand_stvex_be (operands[0], operands[1], <MODE>mode, UNSPEC_STVE);
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DONE;
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}
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})
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(define_insn "*altivec_stve<VI_char>x_internal"
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[(set (match_operand:<VI_scalar> 0 "memory_operand" "=Z")
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(unspec:<VI_scalar> [(match_operand:VI 1 "register_operand" "v")] UNSPEC_STVE))]
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"TARGET_ALTIVEC"
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@ -60,6 +60,7 @@ extern void altivec_expand_vec_perm_le (rtx op[4]);
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extern bool rs6000_expand_vec_perm_const (rtx op[4]);
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extern void altivec_expand_lvx_be (rtx, rtx, enum machine_mode, unsigned);
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extern void altivec_expand_stvx_be (rtx, rtx, enum machine_mode, unsigned);
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extern void altivec_expand_stvex_be (rtx, rtx, enum machine_mode, unsigned);
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extern void rs6000_expand_extract_even (rtx, rtx, rtx);
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extern void rs6000_expand_interleave (rtx, rtx, rtx, bool);
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extern void build_mask64_2_operands (rtx, rtx *);
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@ -11848,7 +11848,7 @@ swap_selector_for_mode (enum machine_mode mode)
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return force_reg (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm)));
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}
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/* Generate code for an "lvx" or "lvxl" built-in for a little endian target
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/* Generate code for an "lvx", "lvxl", or "lve*x" built-in for a little endian target
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with -maltivec=be specified. Issue the load followed by an element-reversing
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permute. */
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void
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@ -11885,6 +11885,23 @@ altivec_expand_stvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspe
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emit_insn (par);
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}
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/* Generate code for a "stve*x" built-in for a little endian target with -maltivec=be
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specified. Issue the store preceded by an element-reversing permute. */
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void
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altivec_expand_stvex_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec)
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{
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enum machine_mode inner_mode = GET_MODE_INNER (mode);
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rtx tmp = gen_reg_rtx (mode);
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rtx stvx = gen_rtx_UNSPEC (inner_mode, gen_rtvec (1, tmp), unspec);
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rtx sel = swap_selector_for_mode (mode);
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rtx vperm;
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gcc_assert (REG_P (op1));
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vperm = gen_rtx_UNSPEC (mode, gen_rtvec (3, op1, op1, sel), UNSPEC_VPERM);
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emit_insn (gen_rtx_SET (VOIDmode, tmp, vperm));
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emit_insn (gen_rtx_SET (VOIDmode, op0, stvx));
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}
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static rtx
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altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk)
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{
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@ -1,3 +1,10 @@
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2014-02-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* gcc.dg/vmx/lde.c: New test.
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* gcc.dg/vmx/lde-be-order.c: New test.
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* gcc.dg/vmx/ste.c: New test.
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* gcc.dg/vmx/ste-be-order.c: New test.
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2014-02-22 Hans-Peter Nilsson <hp@axis.com>
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PR testsuite/60173
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@ -0,0 +1,73 @@
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/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */
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#include "harness.h"
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static unsigned char svuc[16] __attribute__ ((aligned (16)));
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static signed char svsc[16] __attribute__ ((aligned (16)));
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static unsigned short svus[8] __attribute__ ((aligned (16)));
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static signed short svss[8] __attribute__ ((aligned (16)));
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static unsigned int svui[4] __attribute__ ((aligned (16)));
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static signed int svsi[4] __attribute__ ((aligned (16)));
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static float svf[4] __attribute__ ((aligned (16)));
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static void init ()
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{
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int i;
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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for (i = 15; i >= 0; --i)
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#else
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for (i = 0; i < 16; ++i)
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#endif
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{
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svuc[i] = i;
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svsc[i] = i - 8;
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}
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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for (i = 7; i >= 0; --i)
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#else
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for (i = 0; i < 8; ++i)
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#endif
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{
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svus[i] = i;
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svss[i] = i - 4;
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}
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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for (i = 3; i >= 0; --i)
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#else
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for (i = 0; i < 4; ++i)
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#endif
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{
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svui[i] = i;
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svsi[i] = i - 2;
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svf[i] = i * 1.0f;
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}
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}
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static void test ()
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{
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vector unsigned char vuc;
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vector signed char vsc;
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vector unsigned short vus;
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vector signed short vss;
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vector unsigned int vui;
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vector signed int vsi;
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vector float vf;
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init ();
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vuc = vec_lde (9*1, (unsigned char *)svuc);
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vsc = vec_lde (14*1, (signed char *)svsc);
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vus = vec_lde (7*2, (unsigned short *)svus);
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vss = vec_lde (1*2, (signed short *)svss);
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vui = vec_lde (3*4, (unsigned int *)svui);
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vsi = vec_lde (2*4, (signed int *)svsi);
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vf = vec_lde (0*4, (float *)svf);
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check (vec_extract (vuc, 9) == 9, "vuc");
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check (vec_extract (vsc, 14) == 6, "vsc");
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check (vec_extract (vus, 7) == 7, "vus");
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check (vec_extract (vss, 1) == -3, "vss");
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check (vec_extract (vui, 3) == 3, "vui");
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check (vec_extract (vsi, 2) == 0, "vsi");
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check (vec_extract (vf, 0) == 0.0, "vf");
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}
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@ -0,0 +1,59 @@
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#include "harness.h"
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static unsigned char svuc[16] __attribute__ ((aligned (16)));
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static signed char svsc[16] __attribute__ ((aligned (16)));
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static unsigned short svus[8] __attribute__ ((aligned (16)));
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static signed short svss[8] __attribute__ ((aligned (16)));
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static unsigned int svui[4] __attribute__ ((aligned (16)));
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static signed int svsi[4] __attribute__ ((aligned (16)));
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static float svf[4] __attribute__ ((aligned (16)));
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static void init ()
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{
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unsigned int i;
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for (i = 0; i < 16; ++i)
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{
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svuc[i] = i;
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svsc[i] = i - 8;
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}
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for (i = 0; i < 8; ++i)
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{
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svus[i] = i;
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svss[i] = i - 4;
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}
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for (i = 0; i < 4; ++i)
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{
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svui[i] = i;
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svsi[i] = i - 2;
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svf[i] = i * 1.0f;
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}
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}
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static void test ()
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{
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vector unsigned char vuc;
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vector signed char vsc;
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vector unsigned short vus;
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vector signed short vss;
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vector unsigned int vui;
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vector signed int vsi;
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vector float vf;
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init ();
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vuc = vec_lde (9*1, (unsigned char *)svuc);
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vsc = vec_lde (14*1, (signed char *)svsc);
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vus = vec_lde (7*2, (unsigned short *)svus);
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vss = vec_lde (1*2, (signed short *)svss);
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vui = vec_lde (3*4, (unsigned int *)svui);
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vsi = vec_lde (2*4, (signed int *)svsi);
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vf = vec_lde (0*4, (float *)svf);
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check (vec_extract (vuc, 9) == 9, "vuc");
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check (vec_extract (vsc, 14) == 6, "vsc");
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check (vec_extract (vus, 7) == 7, "vus");
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check (vec_extract (vss, 1) == -3, "vss");
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check (vec_extract (vui, 3) == 3, "vui");
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check (vec_extract (vsi, 2) == 0, "vsi");
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check (vec_extract (vf, 0) == 0.0, "vf");
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}
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@ -0,0 +1,53 @@
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/* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mno-vsx" } */
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#include "harness.h"
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static unsigned char svuc[16] __attribute__ ((aligned (16)));
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static signed char svsc[16] __attribute__ ((aligned (16)));
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static unsigned short svus[8] __attribute__ ((aligned (16)));
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static signed short svss[8] __attribute__ ((aligned (16)));
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static unsigned int svui[4] __attribute__ ((aligned (16)));
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static signed int svsi[4] __attribute__ ((aligned (16)));
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static float svf[4] __attribute__ ((aligned (16)));
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static void check_arrays ()
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{
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check (svuc[9] == 9, "svuc");
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check (svsc[14] == 6, "svsc");
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check (svus[7] == 7, "svus");
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check (svss[1] == -3, "svss");
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check (svui[3] == 3, "svui");
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check (svsi[2] == 0, "svsi");
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check (svf[0] == 0.0, "svf");
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}
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static void test ()
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{
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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vector unsigned char vuc = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0};
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vector signed char vsc = {7,6,5,4,3,2,1,0,-1,-2,-3,-4,-5,-6,-7,-8};
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vector unsigned short vus = {7,6,5,4,3,2,1,0};
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vector signed short vss = {3,2,1,0,-1,-2,-3,-4};
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vector unsigned int vui = {3,2,1,0};
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vector signed int vsi = {1,0,-1,-2};
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vector float vf = {3.0,2.0,1.0,0.0};
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#else
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vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
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vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
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vector unsigned short vus = {0,1,2,3,4,5,6,7};
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vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
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vector unsigned int vui = {0,1,2,3};
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vector signed int vsi = {-2,-1,0,1};
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vector float vf = {0.0,1.0,2.0,3.0};
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#endif
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vec_ste (vuc, 9*1, (unsigned char *)svuc);
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vec_ste (vsc, 14*1, (signed char *)svsc);
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vec_ste (vus, 7*2, (unsigned short *)svus);
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vec_ste (vss, 1*2, (signed short *)svss);
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vec_ste (vui, 3*4, (unsigned int *)svui);
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vec_ste (vsi, 2*4, (signed int *)svsi);
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vec_ste (vf, 0*4, (float *)svf);
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check_arrays ();
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}
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#include "harness.h"
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static unsigned char svuc[16] __attribute__ ((aligned (16)));
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static signed char svsc[16] __attribute__ ((aligned (16)));
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static unsigned short svus[8] __attribute__ ((aligned (16)));
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static signed short svss[8] __attribute__ ((aligned (16)));
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static unsigned int svui[4] __attribute__ ((aligned (16)));
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static signed int svsi[4] __attribute__ ((aligned (16)));
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static float svf[4] __attribute__ ((aligned (16)));
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static void check_arrays ()
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{
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check (svuc[9] == 9, "svuc");
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check (svsc[14] == 6, "svsc");
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check (svus[7] == 7, "svus");
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check (svss[1] == -3, "svss");
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check (svui[3] == 3, "svui");
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check (svsi[2] == 0, "svsi");
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check (svf[0] == 0.0, "svf");
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}
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static void test ()
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{
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vector unsigned char vuc = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
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vector signed char vsc = {-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7};
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vector unsigned short vus = {0,1,2,3,4,5,6,7};
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vector signed short vss = {-4,-3,-2,-1,0,1,2,3};
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vector unsigned int vui = {0,1,2,3};
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vector signed int vsi = {-2,-1,0,1};
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vector float vf = {0.0,1.0,2.0,3.0};
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vec_ste (vuc, 9*1, (unsigned char *)svuc);
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vec_ste (vsc, 14*1, (signed char *)svsc);
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vec_ste (vus, 7*2, (unsigned short *)svus);
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vec_ste (vss, 1*2, (signed short *)svss);
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vec_ste (vui, 3*4, (unsigned int *)svui);
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vec_ste (vsi, 2*4, (signed int *)svsi);
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vec_ste (vf, 0*4, (float *)svf);
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check_arrays ();
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}
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