re PR rtl-optimization/78952 (Combine does not convert 8-bit sign-extract to a zero-extract for QImode operations)
PR rtl-optimization/78952 * config/i386/i386.md (any_extract): New code iterator. (*insvqi_2): Use any_extract for source operand. (*insvqi_3): Use any_shiftrt for source operand. testsuite/ChangeLog: PR rtl-optimization/78952 * gcc.target/i386/pr78952-1.c: New test. * gcc.target/i386/pr78952-2.c: Ditto. From-SVN: r244591
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2017-01-18 Uros Bizjak <ubizjak@gmail.com>
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PR rtl-optimization/78952
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* config/i386/i386.md (any_extract): New code iterator.
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(*insvqi_2): Use any_extract for source operand.
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(*insvqi_3): Use any_shiftrt for source operand.
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2017-01-18 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
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@ -15,7 +22,7 @@
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2017-01-18 Matthias Klose <doko@ubuntu.com>
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* doc/install.texi: Allow default for --with-target-bdw-gc-include.
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* doc/install.texi: Allow default for --with-target-bdw-gc-include.
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2016-01-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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@ -41,12 +48,6 @@
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(s390_valid_target_attribute_inner_p): Likewise.
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* config/s390/s390.md ("tabort"): Likewise.
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2017-01-18 Jakub Jelinek <jakub@redhat.com>
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* gcc.target/s390/target-attribute/tattr-2.c: Add -fno-ipa-icf
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to dg-options.
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(p0): Add missing dg-error.
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2017-01-18 Toma Tabacu <toma.tabacu@imgtec.com>
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* config/mips/mips.h (ISA_HAS_DIV3): Remove unused macro.
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@ -2960,13 +2960,15 @@
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(subreg:SI (match_dup 1) 0))
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(unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
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(define_code_iterator any_extract [sign_extract zero_extract])
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(define_insn "*insvqi_2"
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[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
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(const_int 8)
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(const_int 8))
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(zero_extract:SI (match_operand 1 "ext_register_operand" "Q")
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(const_int 8)
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(const_int 8)))]
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(any_extract:SI (match_operand 1 "ext_register_operand" "Q")
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(const_int 8)
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(const_int 8)))]
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""
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"mov{b}\t{%h1, %h0|%h0, %h1}"
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[(set_attr "type" "imov")
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@ -2976,8 +2978,8 @@
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[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
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(const_int 8)
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(const_int 8))
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(lshiftrt:SI (match_operand:SI 1 "register_operand" "Q")
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(const_int 8)))]
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(any_shiftrt:SI (match_operand:SI 1 "register_operand" "Q")
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(const_int 8)))]
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""
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"mov{b}\t{%h1, %h0|%h0, %h1}"
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[(set_attr "type" "imov")
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@ -1,3 +1,9 @@
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2017-01-18 Uros Bizjak <ubizjak@gmail.com>
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PR rtl-optimization/78952
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* gcc.target/i386/pr78952-1.c: New test.
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* gcc.target/i386/pr78952-2.c: Ditto.
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2017-01-18 Andre Vehreschild <vehre@gcc.gnu.org>
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* gfortran.dg/coarray_alloc_with_implicit_sync_2.f90: New test.
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@ -46,6 +52,12 @@
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PR c++/79091
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* g++.dg/pr79091.C: New.
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2017-01-18 Jakub Jelinek <jakub@redhat.com>
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* gcc.target/s390/target-attribute/tattr-2.c: Add -fno-ipa-icf
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to dg-options.
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(p0): Add missing dg-error.
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2017-01-17 Joe Seymour <joe.s@somniumtech.com>
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* gcc.target/msp430/mul_f5_muldef.c: New test.
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@ -177,7 +189,7 @@
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2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
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Revert:
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2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
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2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
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PR c++/71737
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* g++.dg/cpp0x/pr71737.C: New.
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@ -198,8 +210,8 @@
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2017-01-14 Bernd Schmidt <bschmidt@redhat.com>
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PR rtl-optimization/78626
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PR rtl-optimization/78727
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PR rtl-optimization/78626
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PR rtl-optimization/78727
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* gcc.dg/torture/pr78626.c: New test.
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* gcc.dg/torture/pr78727.c: New test.
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@ -0,0 +1,21 @@
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/* PR target/78952 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -masm=att" } */
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/* { dg-additional-options "-mregparm=3" { target ia32 } } */
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/* { dg-final { scan-assembler-not "movsbl" } } */
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struct S1
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{
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char pad1;
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char val;
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short pad2;
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};
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struct S1 foo (struct S1 a, struct S1 b)
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{
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a.val = b.val;
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return a;
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}
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/* { dg-final { scan-assembler "\[ \t\]movb\[ \t\]+%.h, %.h" } } */
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@ -0,0 +1,21 @@
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/* PR target/78952 */
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/* { dg-do compile } */
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/* { dg-options "-O2 -masm=att" } */
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/* { dg-additional-options "-mregparm=3" { target ia32 } } */
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/* { dg-final { scan-assembler-not "sarl" } } */
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struct S1
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{
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char pad1;
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char val;
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short pad2;
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};
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struct S1 foo (struct S1 a, int b)
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{
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a.val = b >> 8;
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return a;
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}
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/* { dg-final { scan-assembler "\[ \t\]movb\[ \t\]+%.h, %.h" } } */
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