RISC-V: Add and document the "-mno-relax" option
RISC-V relies on aggressive linker relaxation to get good code size. As a result no text symbol addresses can be known until link time, which means that alignment must be handled during the link. This alignment pass is essentially just another linker relaxation, so this has the unfortunate side effect that linker relaxation is required for correctness on many RISC-V targets. The RISC-V assembler has supported an ".option norelax" for a long time because there are situations in which linker relaxation is a bad idea -- the canonical example is when trying to materialize the initial value of the global pointer into a register, which would otherwise be relaxed to a NOP. We've been relying on users who want to disable relaxation for an entire link to pass "-Wl,--no-relax", but that still relies on the linker relaxing R_RISCV_ALIGN to handle alignment despite it not being strictly necessary. This patch adds a GCC option, "-mno-relax", that disable linker relaxation by adding ".option norelax" to the top of every generated assembly file. The assembler is smart enough to handle alignment at assemble time for files that have never emitted a relaxable relocation, so this is sufficient to really disable all relaxations in the linker, which results in significantly faster link times for large objects. This also has the side effect of allowing toolchains that don't support linker relaxation (LLVM and the Linux module loader) to function correctly. Toolchains that don't support linker relaxation should default to "-mno-relax" and error when presented with any R_RISCV_ALIGN relocation as those need to be handled for correctness. gcc/ChangeLog 2018-03-13 Palmer Dabbelt <palmer@sifive.com> * config/riscv/riscv.opt (mrelax): New option. * config/riscv/riscv.c (riscv_file_start): Emit ".option "norelax" when riscv_mrelax is disabled. * doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax". From-SVN: r258499
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2018-03-01 Palmer Dabbelt <palmer@sifive.com>
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* config/riscv/riscv.opt (mrelax): New option.
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* config/riscv/riscv.c (riscv_file_start): Emit ".option
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"norelax" when riscv_mrelax is disabled.
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* doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".
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2018-03-13 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
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PR target/84743
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@ -3979,6 +3979,11 @@ riscv_file_start (void)
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/* Instruct GAS to generate position-[in]dependent code. */
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fprintf (asm_out_file, "\t.option %spic\n", (flag_pic ? "" : "no"));
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/* If the user specifies "-mno-relax" on the command line then disable linker
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relaxation in the assembler. */
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if (! riscv_mrelax)
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fprintf (asm_out_file, "\t.option norelax\n");
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}
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/* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
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@ -106,6 +106,11 @@ mexplicit-relocs
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Target Report Mask(EXPLICIT_RELOCS)
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Use %reloc() operators, rather than assembly macros, to load addresses.
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mrelax
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Target Bool Var(riscv_mrelax) Init(1)
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Take advantage of linker relaxations to reduce the number of instructions
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required to materialize symbol addresses.
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Mask(64BIT)
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Mask(MUL)
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@ -1042,7 +1042,8 @@ See RS/6000 and PowerPC Options.
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-msave-restore -mno-save-restore @gol
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-mstrict-align -mno-strict-align @gol
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-mcmodel=medlow -mcmodel=medany @gol
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-mexplicit-relocs -mno-explicit-relocs @gol}
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-mexplicit-relocs -mno-explicit-relocs @gol
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-mrelax -mno-relax @gol}
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@emph{RL78 Options}
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@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=g14 -mallregs @gol
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@ -23102,6 +23103,12 @@ Use or do not use assembler relocation operators when dealing with symbolic
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addresses. The alternative is to use assembler macros instead, which may
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limit optimization.
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@item -mrelax
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@itemx -mno-relax
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Take advantage of linker relaxations to reduce the number of instructions
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required to materialize symbol addresses. The default is to take advantage of
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linker relaxations.
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@end table
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@node RL78 Options
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