i386.md (*movoi_internal_avx): Set mode attribute to XI for SSE constm1 operands and TARGET_AVX512VL.
* config/i386/i386.md (*movoi_internal_avx): Set mode attribute to XI for SSE constm1 operands and TARGET_AVX512VL. (*movti_internal): Ditto. (*mov<mode>_or): Use constm1_operand predicate. * config/i386/sse.md (*mov<mode>_internal): Set mode attribute to XI for SSE vector_all_ones operands and TARGET_AVX512VL. * config/i386/predicates.md (constm1_operand): New predicate. * config/i386/i386.c (standard_sse_constant_opcode): Simplify emission of constant -1 load. From-SVN: r235416
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@ -1,3 +1,15 @@
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2016-04-25 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*movoi_internal_avx): Set mode attribute to XI
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for SSE constm1 operands and TARGET_AVX512VL.
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(*movti_internal): Ditto.
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(*mov<mode>_or): Use constm1_operand predicate.
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* config/i386/sse.md (*mov<mode>_internal): Set mode attribute to XI
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for SSE vector_all_ones operands and TARGET_AVX512VL.
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* config/i386/predicates.md (constm1_operand): New predicate.
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* config/i386/i386.c (standard_sse_constant_opcode): Simplify
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emission of constant -1 load.
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2016-04-25 Jason Merrill <jason@redhat.com>
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* gdbinit.in: Skip is-a.h.
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@ -10868,30 +10868,24 @@ standard_sse_constant_opcode (rtx_insn *insn, rtx x)
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case MODE_V8DF:
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case MODE_V16SF:
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gcc_assert (TARGET_AVX512F);
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break;
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return "vpternlogd\t{$0xFF, %g0, %g0, %g0|%g0, %g0, %g0, 0xFF}";
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case MODE_OI:
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case MODE_V4DF:
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case MODE_V8SF:
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gcc_assert (TARGET_AVX2);
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break;
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/* FALLTHRU */
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case MODE_TI:
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case MODE_V2DF:
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case MODE_V4SF:
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gcc_assert (TARGET_SSE2);
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break;
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return (TARGET_AVX
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? "vpcmpeqd\t%0, %0, %0"
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: "pcmpeqd\t%0, %0");
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default:
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gcc_unreachable ();
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}
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if (TARGET_AVX512VL
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|| insn_mode == MODE_XI
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|| insn_mode == MODE_V8DF
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|| insn_mode == MODE_V16SF)
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return "vpternlogd\t{$0xFF, %g0, %g0, %g0|%g0, %g0, %g0, 0xFF}";
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else if (TARGET_AVX)
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return "vpcmpeqd\t%0, %0, %0";
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else
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return "pcmpeqd\t%0, %0";
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}
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gcc_unreachable ();
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@ -1960,10 +1960,9 @@
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(define_insn "*mov<mode>_or"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(match_operand:SWI48 1 "const_int_operand"))
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(match_operand:SWI48 1 "constm1_operand"))
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(clobber (reg:CC FLAGS_REG))]
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"reload_completed
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&& operands[1] == constm1_rtx"
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"reload_completed"
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"or{<imodesuffix>}\t{%1, %0|%0, %1}"
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[(set_attr "type" "alu1")
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(set_attr "mode" "<MODE>")
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@ -2039,10 +2038,13 @@
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(cond [(ior (match_operand 0 "ext_sse_reg_operand")
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(match_operand 1 "ext_sse_reg_operand"))
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(const_string "XI")
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(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
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(const_string "V8SF")
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(and (eq_attr "alternative" "3")
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(match_test "TARGET_SSE_TYPELESS_STORES"))
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(and (eq_attr "alternative" "0")
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(and (match_test "TARGET_AVX512VL")
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(match_operand 1 "constm1_operand")))
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(const_string "XI")
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(ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
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(and (eq_attr "alternative" "3")
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(match_test "TARGET_SSE_TYPELESS_STORES")))
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(const_string "V8SF")
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]
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(const_string "OI")))])
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@ -2099,16 +2101,19 @@
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(const_string "maybe_vex")
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(const_string "orig")))
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(set (attr "mode")
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(cond [(ior (match_operand 0 "ext_sse_reg_operand")
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(cond [(eq_attr "alternative" "0,1")
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(const_string "DI")
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(ior (match_operand 0 "ext_sse_reg_operand")
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(match_operand 1 "ext_sse_reg_operand"))
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(const_string "XI")
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(eq_attr "alternative" "0,1")
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(const_string "DI")
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(and (eq_attr "alternative" "2")
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(and (match_test "TARGET_AVX512VL")
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(match_operand 1 "constm1_operand")))
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(const_string "XI")
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(ior (not (match_test "TARGET_SSE2"))
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(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
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(const_string "V4SF")
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(and (eq_attr "alternative" "5")
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(match_test "TARGET_SSE_TYPELESS_STORES"))
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(ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
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(and (eq_attr "alternative" "5")
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(match_test "TARGET_SSE_TYPELESS_STORES"))))
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(const_string "V4SF")
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(match_test "TARGET_AVX")
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(const_string "TI")
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@ -675,6 +675,11 @@
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return op == CONST1_RTX (mode);
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})
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;; Match exactly -1.
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(define_predicate "constm1_operand"
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(and (match_code "const_int")
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(match_test "op = constm1_rtx")))
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;; Match exactly eight.
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(define_predicate "const8_operand"
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(and (match_code "const_int")
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@ -938,7 +938,11 @@
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[(set_attr "type" "sselog1,ssemov,ssemov")
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(set_attr "prefix" "maybe_vex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE_SIZE> == 16")
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(cond [(and (eq_attr "alternative" "0")
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(and (match_test "TARGET_AVX512VL")
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(match_operand 1 "vector_all_ones_operand")))
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(const_string "XI")
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(and (match_test "<MODE_SIZE> == 16")
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(ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
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(and (eq_attr "alternative" "2")
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(match_test "TARGET_SSE_TYPELESS_STORES"))))
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