From a7fd5c6b06407119b4319d6e7970e02965c017d7 Mon Sep 17 00:00:00 2001 From: Georg-Johann Lay Date: Mon, 30 Jan 2012 19:38:07 +0000 Subject: [PATCH] avr.md: Resolve all AS1 and AS2 macros. * config/avr/avr.md: Resolve all AS1 and AS2 macros. Transform all "* quoted-c-code" to { c-code }. Remove redundant test for "optimize" in combine patterns. Move (include "avr-dimode.md") to end of file. From-SVN: r183739 --- gcc/ChangeLog | 7 ++ gcc/config/avr/avr.md | 167 +++++++++++++++++++++++------------------- 2 files changed, 98 insertions(+), 76 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 526f17cc329..57e3a20b361 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-01-30 Georg-Johann Lay + + * config/avr/avr.md: Resolve all AS1 and AS2 macros. + Transform all "* quoted-c-code" to { c-code }. + Remove redundant test for "optimize" in combine patterns. + Move (include "avr-dimode.md") to end of file. + 2012-01-30 Bin Cheng PR target/51835 diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 24044b3a8f9..0ea30b45609 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -1152,7 +1152,7 @@ }; if (*asm_code[which_alternative]) - return asm_code [which_alternative]; + return asm_code[which_alternative]; return avr_out_plus (operands, NULL, NULL); } @@ -1221,7 +1221,7 @@ }; if (*asm_code[which_alternative]) - return asm_code [which_alternative]; + return asm_code[which_alternative]; return avr_out_plus (operands, NULL, NULL); } @@ -1346,13 +1346,13 @@ (mult:QI (match_operand:QI 1 "register_operand" "") (match_operand:QI 2 "register_operand" "")))] "" - "{ - if (!AVR_HAVE_MUL) - { - emit_insn (gen_mulqi3_call (operands[0], operands[1], operands[2])); - DONE; - } -}") + { + if (!AVR_HAVE_MUL) + { + emit_insn (gen_mulqi3_call (operands[0], operands[1], operands[2])); + DONE; + } + }) (define_insn "*mulqi3_enh" [(set (match_operand:QI 0 "register_operand" "=r") @@ -4381,7 +4381,9 @@ (label_ref (match_operand 3 "" "")) (pc)))] "" - "* return avr_out_sbxx_branch (insn, operands);" + { + return avr_out_sbxx_branch (insn, operands); + } [(set (attr "length") (if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046)) (le (minus (pc) (match_dup 3)) (const_int 2046))) @@ -4559,8 +4561,9 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "* - return ret_cond_branch (operands[1], avr_jump_mode (operands[0],insn), 0);" + { + return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 0); + } [(set_attr "type" "branch1") (set_attr "cc" "clobber")]) @@ -4574,8 +4577,9 @@ (pc) (label_ref (match_operand 0 "" ""))))] "" - "* - return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);" + { + return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); + } [(set_attr "type" "branch1") (set_attr "cc" "clobber")]) @@ -4587,8 +4591,9 @@ (pc) (label_ref (match_operand 0 "" ""))))] "" - "* - return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1);" + { + return ret_cond_branch (operands[1], avr_jump_mode (operands[0], insn), 1); + } [(set_attr "type" "branch") (set_attr "cc" "clobber")]) @@ -4769,10 +4774,9 @@ (use (label_ref (match_dup 3))) (clobber (match_dup 6))])] "" - " -{ - operands[6] = gen_reg_rtx (HImode); -}") + { + operands[6] = gen_reg_rtx (HImode); + }) ;; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ @@ -4791,7 +4795,7 @@ [(set (mem:QI (match_operand 0 "low_io_address_operand" "n")) (and:QI (mem:QI (match_dup 0)) (match_operand:QI 1 "single_zero_operand" "n")))] - "optimize > 0" + "" { operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff)); return "cbi %i0,%2"; @@ -4803,7 +4807,7 @@ [(set (mem:QI (match_operand 0 "low_io_address_operand" "n")) (ior:QI (mem:QI (match_dup 0)) (match_operand:QI 1 "single_one_operand" "n")))] - "optimize > 0" + "" { operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff)); return "sbi %i0,%2"; @@ -4823,8 +4827,10 @@ (const_int 0)]) (label_ref (match_operand 3 "" "")) (pc)))] - "(optimize > 0)" - "* return avr_out_sbxx_branch (insn, operands);" + "" + { + return avr_out_sbxx_branch (insn, operands); + } [(set (attr "length") (if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046)) (le (minus (pc) (match_dup 3)) (const_int 2046))) @@ -4843,7 +4849,7 @@ (const_int 0)]) (label_ref (match_operand 2 "" "")) (pc)))] - "(optimize > 0)" + "" { operands[3] = operands[2]; operands[2] = GEN_INT (7); @@ -4870,8 +4876,10 @@ (const_int 0)]) (label_ref (match_operand 3 "" "")) (pc)))] - "(optimize > 0)" - "* return avr_out_sbxx_branch (insn, operands);" + "" + { + return avr_out_sbxx_branch (insn, operands); + } [(set (attr "length") (if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046)) (le (minus (pc) (match_dup 3)) (const_int 2045))) @@ -4889,7 +4897,7 @@ (const_int 0)]) (label_ref (match_operand 2 "" "")) (pc)))] - "(optimize > 0)" + "" { operands[3] = operands[2]; operands[2] = GEN_INT (7); @@ -4924,26 +4932,27 @@ { CC_STATUS_INIT; if (test_hard_reg_class (ADDW_REGS, operands[0])) - output_asm_insn (AS2 (sbiw,%0,1) CR_TAB - AS2 (sbc,%C0,__zero_reg__) CR_TAB - AS2 (sbc,%D0,__zero_reg__) "\n", operands); + output_asm_insn ("sbiw %0,1" CR_TAB + "sbc %C0,__zero_reg__" CR_TAB + "sbc %D0,__zero_reg__", operands); else - output_asm_insn (AS2 (subi,%A0,1) CR_TAB - AS2 (sbc,%B0,__zero_reg__) CR_TAB - AS2 (sbc,%C0,__zero_reg__) CR_TAB - AS2 (sbc,%D0,__zero_reg__) "\n", operands); + output_asm_insn ("subi %A0,1" CR_TAB + "sbc %B0,__zero_reg__" CR_TAB + "sbc %C0,__zero_reg__" CR_TAB + "sbc %D0,__zero_reg__", operands); switch (avr_jump_mode (operands[2], insn)) { case 1: - return AS1 (brcc,%2); + return "brcc %2"; case 2: - return (AS1 (brcs,.+2) CR_TAB - AS1 (rjmp,%2)); + return "brcs .+2\;rjmp %2"; + case 3: + return "brcs .+4\;jmp %2"; } - return (AS1 (brcs,.+4) CR_TAB - AS1 (jmp,%2)); + gcc_unreachable(); + return ""; }) (define_peephole @@ -4960,25 +4969,27 @@ (label_ref (match_operand 2 "" "")) (pc)))] "" - "* -{ - CC_STATUS_INIT; - if (test_hard_reg_class (ADDW_REGS, operands[0])) - output_asm_insn (AS2 (sbiw,%0,1), operands); - else - output_asm_insn (AS2 (subi,%A0,1) CR_TAB - AS2 (sbc,%B0,__zero_reg__) \"\\n\", operands); - switch (avr_jump_mode (operands[2],insn)) { - case 1: - return AS1 (brcc,%2); - case 2: - return (AS1 (brcs,.+2) CR_TAB - AS1 (rjmp,%2)); - } - return (AS1 (brcs,.+4) CR_TAB - AS1 (jmp,%2)); -}") + CC_STATUS_INIT; + if (test_hard_reg_class (ADDW_REGS, operands[0])) + output_asm_insn ("sbiw %0,1", operands); + else + output_asm_insn ("subi %A0,1" CR_TAB + "sbc %B0,__zero_reg__", operands); + + switch (avr_jump_mode (operands[2], insn)) + { + case 1: + return "brcc %2"; + case 2: + return "brcs .+2\;rjmp %2"; + case 3: + return "brcs .+4\;jmp %2"; + } + + gcc_unreachable(); + return ""; + }) (define_peephole [(set (match_operand:QI 0 "d_register_operand" "") @@ -4992,23 +5003,26 @@ (label_ref (match_operand 1 "" "")) (pc)))] "" - "* -{ - CC_STATUS_INIT; - cc_status.value1 = operands[0]; - cc_status.flags |= CC_OVERFLOW_UNUSABLE; - output_asm_insn (AS2 (subi,%A0,1), operands); - switch (avr_jump_mode (operands[1],insn)) { - case 1: - return AS1 (brcc,%1); - case 2: - return (AS1 (brcs,.+2) CR_TAB - AS1 (rjmp,%1)); - } - return (AS1 (brcs,.+4) CR_TAB - AS1 (jmp,%1)); -}") + CC_STATUS_INIT; + cc_status.value1 = operands[0]; + cc_status.flags |= CC_OVERFLOW_UNUSABLE; + + output_asm_insn ("subi %A0,1", operands); + + switch (avr_jump_mode (operands[1], insn)) + { + case 1: + return "brcc %1"; + case 2: + return "brcs .+2\;rjmp %1"; + case 3: + return "brcs .+4\;jmp %1"; + } + + gcc_unreachable(); + return ""; + }) (define_peephole ; "*cpse.eq" @@ -5947,8 +5961,6 @@ operands[4] = simplify_gen_subreg (QImode, operands[0], HImode, 1); }) -(include "avr-dimode.md") - (define_insn_and_split "*extzv.qihi2" [(set (match_operand:HI 0 "register_operand" "=r") (zero_extend:HI @@ -5968,3 +5980,6 @@ operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, 0); operands[4] = simplify_gen_subreg (QImode, operands[0], HImode, 1); }) + + +(include "avr-dimode.md")