i386.md (cbranchsi4): Use nonimmediate_operand for operand 1 predicate.
* config/i386/i386.md (cbranchsi4): Use nonimmediate_operand for
operand 1 predicate.
(cstoresi4): Ditto for operand 2.
(cbranch<mode>4): Macroize expander from cbranch{qi,hi,si,di,ti}4
patterns using SDWIM mode iterator.
(cstore<mode>4): Macroize expander from cstore{qi,hi,si,di}4 patterns
using SWIM mode iterator.
(cmpdi_1): Rename from cmpdi_1_rex64.
(cmp<mode>_1): Macroize expander from cmp{si,di}_1 patterns using
SWI48 mode iterator.
(*cmp<mode>_1): Macroize insn from *cmp{qi,hi,si,di}_1_insn using SWI
mode iterator.
(*cmp<mode>_ccno_1): Ditto from *cmp{qi,hi,si,di}_ccno_1.
(*cmp<mode>_minus_1): Ditto from *cmp{qi,hi,si,di}_minus_1.
(*cmpqi_ext_3_insn): Make private.
(*cmpqi_ext_3_insn_rex64): Make private.
(cmpstrnsi): Update for renamed cmpdi_1_rex64.
* config/i386/predicates.md (cmpsi_operand): Remove.
From-SVN: r154212
This commit is contained in:
Uros Bizjak
parent
f61428ed3c
commit
a81f2330a3
@ -1,3 +1,24 @@
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2009-11-16 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (cbranchsi4): Use nonimmediate_operand for
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operand 1 predicate.
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(cstoresi4): Ditto for operand 2.
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(cbranch<mode>4): Macroize expander from cbranch{qi,hi,si,di,ti}4
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patterns using SDWIM mode iterator.
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(cstore<mode>4): Macroize expander from cstore{qi,hi,si,di}4 patterns
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using SWIM mode iterator.
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(cmpdi_1): Rename from cmpdi_1_rex64.
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(cmp<mode>_1): Macroize expander from cmp{si,di}_1 patterns using
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SWI48 mode iterator.
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(*cmp<mode>_1): Macroize insn from *cmp{qi,hi,si,di}_1_insn using SWI
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mode iterator.
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(*cmp<mode>_ccno_1): Ditto from *cmp{qi,hi,si,di}_ccno_1.
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(*cmp<mode>_minus_1): Ditto from *cmp{qi,hi,si,di}_minus_1.
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(*cmpqi_ext_3_insn): Make private.
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(*cmpqi_ext_3_insn_rex64): Make private.
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(cmpstrnsi): Update for renamed cmpdi_1_rex64.
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* config/i386/predicates.md (cmpsi_operand): Remove.
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2009-11-16 Paul Brook <paul@codesourcery.com>
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* doc/invoke.texi: Document ARM VFPv4 based FPUs.
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@ -5,19 +26,19 @@
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2009-11-14 Jan Hubicka <jh@suse.cz>
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* cgraphbuild.c (compute_call_stmt_bb_frequency): Use proper ENTRY_BLOCK_PTR.
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* cgraph.c (cgraph_clone_edge): Avoid freq_scale 0 to completely zero out all
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callees.
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* cgraphunit.c (verify_cgraph_node): Verify cgraph nodes for frequency and count match.
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* cgraphbuild.c (compute_call_stmt_bb_frequency): Use proper
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ENTRY_BLOCK_PTR.
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* cgraph.c (cgraph_clone_edge): Avoid freq_scale 0 to completely
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zero out all callees.
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* cgraphunit.c (verify_cgraph_node): Verify cgraph nodes for
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frequency and count match.
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* ipa-inline.c (update_noncloned_frequencies): New function.
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(cgraph_clone_inlined_nodes): Use it.
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* tree-inline.c (copy_bb): Fix frequency scaling; output
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diagnostic on frequency mismatches to dump file.
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(initialize_cfun): Do not scale frequency; fix count scaling;
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initialize entry and exit block frequencies; copy profile
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info.
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(copy_cfg_body): Use frequency_scale as argument;
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fix count scaling.
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initialize entry and exit block frequencies; copy profile info.
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(copy_cfg_body): Use frequency_scale as argument; fix count scaling.
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(copy_body): Use frequency_scale as argument.
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(expand_call_inline): Compute frequency scale and output diagnostic
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to dump file.
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@ -65,7 +86,7 @@
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new 'outgoing' argument.
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(iq2000_libcall_value, iq2000_function_value_regno_p): New functions.
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(TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE): Declare.
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* config/iq2000/iq2000.h: (FUNCTION_VALUE_REGNO_P): Redefine, use
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* config/iq2000/iq2000.h (FUNCTION_VALUE_REGNO_P): Redefine, use
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iq2000_function_value_regno_p.
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(FUNCTION_VALUE, LIBCALL_VALUE): Remove.
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* config/iq2000/iq2000-protos.h (iq2000_function_value_regno_p):
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@ -843,322 +843,80 @@
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;; Compare and branch/compare and store instructions.
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(define_expand "cbranchti4"
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(define_expand "cbranch<mode>4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:TI 1 "nonimmediate_operand" "")
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(match_operand:TI 2 "x86_64_general_operand" "")))
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(compare:CC (match_operand:SDWIM 1 "nonimmediate_operand" "")
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(match_operand:SDWIM 2 "<general_operand>" "")))
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(set (pc) (if_then_else
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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"TARGET_64BIT"
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{
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if (MEM_P (operands[1]) && MEM_P (operands[2]))
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operands[1] = force_reg (TImode, operands[1]);
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ix86_compare_op0 = operands[1];
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ix86_compare_op1 = operands[2];
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ix86_expand_branch (GET_CODE (operands[0]), operands[3]);
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DONE;
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})
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(define_expand "cbranchdi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:DI 1 "nonimmediate_operand" "")
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(match_operand:DI 2 "x86_64_general_operand" "")))
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(set (pc) (if_then_else
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG) (const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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""
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{
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if (MEM_P (operands[1]) && MEM_P (operands[2]))
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operands[1] = force_reg (DImode, operands[1]);
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operands[1] = force_reg (<MODE>mode, operands[1]);
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ix86_compare_op0 = operands[1];
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ix86_compare_op1 = operands[2];
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ix86_expand_branch (GET_CODE (operands[0]), operands[3]);
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DONE;
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})
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(define_expand "cstoredi4"
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(define_expand "cstore<mode>4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:DI 2 "nonimmediate_operand" "")
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(match_operand:DI 3 "x86_64_general_operand" "")))
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(compare:CC (match_operand:SWIM 2 "nonimmediate_operand" "")
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(match_operand:SWIM 3 "<general_operand>" "")))
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(set (match_operand:QI 0 "register_operand" "")
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(match_operator 1 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)]))]
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"TARGET_64BIT"
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(match_operator 1 "comparison_operator"
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[(reg:CC FLAGS_REG) (const_int 0)]))]
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""
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{
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if (MEM_P (operands[2]) && MEM_P (operands[3]))
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operands[2] = force_reg (DImode, operands[2]);
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operands[2] = force_reg (<MODE>mode, operands[2]);
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ix86_compare_op0 = operands[2];
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ix86_compare_op1 = operands[3];
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ix86_expand_setcc (GET_CODE (operands[1]), operands[0]);
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DONE;
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})
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(define_expand "cbranchsi4"
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(define_expand "cmp<mode>_1"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:SI 1 "cmpsi_operand" "")
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(match_operand:SI 2 "general_operand" "")))
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(set (pc) (if_then_else
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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""
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{
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if (MEM_P (operands[1]) && MEM_P (operands[2]))
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operands[1] = force_reg (SImode, operands[1]);
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ix86_compare_op0 = operands[1];
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ix86_compare_op1 = operands[2];
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ix86_expand_branch (GET_CODE (operands[0]), operands[3]);
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DONE;
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})
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(define_expand "cstoresi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:SI 2 "cmpsi_operand" "")
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(match_operand:SI 3 "general_operand" "")))
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(set (match_operand:QI 0 "register_operand" "")
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(match_operator 1 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)]))]
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""
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{
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if (MEM_P (operands[2]) && MEM_P (operands[3]))
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operands[2] = force_reg (SImode, operands[2]);
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ix86_compare_op0 = operands[2];
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ix86_compare_op1 = operands[3];
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ix86_expand_setcc (GET_CODE (operands[1]), operands[0]);
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DONE;
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})
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(define_expand "cbranchhi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:HI 1 "nonimmediate_operand" "")
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(match_operand:HI 2 "general_operand" "")))
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(set (pc) (if_then_else
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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""
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{
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if (MEM_P (operands[1]) && MEM_P (operands[2]))
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operands[1] = force_reg (HImode, operands[1]);
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ix86_compare_op0 = operands[1];
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ix86_compare_op1 = operands[2];
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ix86_expand_branch (GET_CODE (operands[0]), operands[3]);
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DONE;
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})
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(define_expand "cstorehi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:HI 2 "nonimmediate_operand" "")
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(match_operand:HI 3 "general_operand" "")))
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(set (match_operand:QI 0 "register_operand" "")
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(match_operator 1 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)]))]
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""
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{
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if (MEM_P (operands[2]) && MEM_P (operands[3]))
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operands[2] = force_reg (HImode, operands[2]);
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ix86_compare_op0 = operands[2];
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ix86_compare_op1 = operands[3];
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ix86_expand_setcc (GET_CODE (operands[1]), operands[0]);
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DONE;
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})
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(define_expand "cbranchqi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:QI 1 "nonimmediate_operand" "")
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(match_operand:QI 2 "general_operand" "")))
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(set (pc) (if_then_else
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(match_operator 0 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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""
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{
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if (MEM_P (operands[1]) && MEM_P (operands[2]))
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operands[1] = force_reg (QImode, operands[1]);
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ix86_compare_op0 = operands[1];
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ix86_compare_op1 = operands[2];
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ix86_expand_branch (GET_CODE (operands[0]), operands[3]);
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DONE;
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})
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(define_expand "cstoreqi4"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:QI 2 "nonimmediate_operand" "")
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(match_operand:QI 3 "general_operand" "")))
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(set (match_operand:QI 0 "register_operand" "")
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(match_operator 1 "comparison_operator"
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[(reg:CC FLAGS_REG)
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(const_int 0)]))]
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""
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{
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if (MEM_P (operands[2]) && MEM_P (operands[3]))
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operands[2] = force_reg (QImode, operands[2]);
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ix86_compare_op0 = operands[2];
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ix86_compare_op1 = operands[3];
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ix86_expand_setcc (GET_CODE (operands[1]), operands[0]);
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DONE;
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})
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(define_insn "cmpdi_ccno_1_rex64"
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[(set (reg FLAGS_REG)
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(compare (match_operand:DI 0 "nonimmediate_operand" "r,?mr")
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(match_operand:DI 1 "const0_operand" "")))]
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"TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
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"@
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test{q}\t%0, %0
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cmp{q}\t{%1, %0|%0, %1}"
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[(set_attr "type" "test,icmp")
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(set_attr "length_immediate" "0,1")
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(set_attr "mode" "DI")])
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(define_insn "*cmpdi_minus_1_rex64"
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[(set (reg FLAGS_REG)
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(compare (minus:DI (match_operand:DI 0 "nonimmediate_operand" "rm,r")
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(match_operand:DI 1 "x86_64_general_operand" "re,mr"))
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(const_int 0)))]
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"TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)"
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"cmp{q}\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "mode" "DI")])
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|
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(define_expand "cmpdi_1_rex64"
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[(set (reg:CC FLAGS_REG)
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(compare:CC (match_operand:DI 0 "nonimmediate_operand" "")
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(match_operand:DI 1 "general_operand" "")))]
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"TARGET_64BIT"
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"")
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(define_insn "cmpdi_1_insn_rex64"
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[(set (reg FLAGS_REG)
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(compare (match_operand:DI 0 "nonimmediate_operand" "mr,r")
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(match_operand:DI 1 "x86_64_general_operand" "re,mr")))]
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"TARGET_64BIT && ix86_match_ccmode (insn, CCmode)"
|
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"cmp{q}\t{%1, %0|%0, %1}"
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[(set_attr "type" "icmp")
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(set_attr "mode" "DI")])
|
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|
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|
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(define_insn "*cmpsi_ccno_1"
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[(set (reg FLAGS_REG)
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(compare (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
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(match_operand:SI 1 "const0_operand" "")))]
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"ix86_match_ccmode (insn, CCNOmode)"
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"@
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test{l}\t%0, %0
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cmp{l}\t{%1, %0|%0, %1}"
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[(set_attr "type" "test,icmp")
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(set_attr "length_immediate" "0,1")
|
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(set_attr "mode" "SI")])
|
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|
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(define_insn "*cmpsi_minus_1"
|
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[(set (reg FLAGS_REG)
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(compare (minus:SI (match_operand:SI 0 "nonimmediate_operand" "rm,r")
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(match_operand:SI 1 "general_operand" "ri,mr"))
|
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(const_int 0)))]
|
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"ix86_match_ccmode (insn, CCGOCmode)"
|
||||
"cmp{l}\t{%1, %0|%0, %1}"
|
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[(set_attr "type" "icmp")
|
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(set_attr "mode" "SI")])
|
||||
|
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(define_expand "cmpsi_1"
|
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[(set (reg:CC FLAGS_REG)
|
||||
(compare:CC (match_operand:SI 0 "nonimmediate_operand" "")
|
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(match_operand:SI 1 "general_operand" "")))]
|
||||
(compare:CC (match_operand:SWI48 0 "nonimmediate_operand" "")
|
||||
(match_operand:SWI48 1 "<general_operand>" "")))]
|
||||
""
|
||||
"")
|
||||
|
||||
(define_insn "*cmpsi_1_insn"
|
||||
(define_insn "*cmp<mode>_ccno_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (match_operand:SI 0 "nonimmediate_operand" "rm,r")
|
||||
(match_operand:SI 1 "general_operand" "ri,mr")))]
|
||||
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
|
||||
&& ix86_match_ccmode (insn, CCmode)"
|
||||
"cmp{l}\t{%1, %0|%0, %1}"
|
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[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "SI")])
|
||||
|
||||
(define_insn "*cmphi_ccno_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
|
||||
(match_operand:HI 1 "const0_operand" "")))]
|
||||
(compare (match_operand:SWI 0 "nonimmediate_operand" "<r>,?m<r>")
|
||||
(match_operand:SWI 1 "const0_operand" "")))]
|
||||
"ix86_match_ccmode (insn, CCNOmode)"
|
||||
"@
|
||||
test{w}\t%0, %0
|
||||
cmp{w}\t{%1, %0|%0, %1}"
|
||||
test{<imodesuffix>}\t%0, %0
|
||||
cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "test,icmp")
|
||||
(set_attr "length_immediate" "0,1")
|
||||
(set_attr "mode" "HI")])
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
(define_insn "*cmphi_minus_1"
|
||||
(define_insn "*cmp<mode>_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (minus:HI (match_operand:HI 0 "nonimmediate_operand" "rm,r")
|
||||
(match_operand:HI 1 "general_operand" "rn,mr"))
|
||||
(const_int 0)))]
|
||||
(compare (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")
|
||||
(match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m")))]
|
||||
"ix86_match_ccmode (insn, CCmode)"
|
||||
"cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
(define_insn "*cmp<mode>_minus_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare
|
||||
(minus:SWI (match_operand:SWI 0 "nonimmediate_operand" "<r>m,<r>")
|
||||
(match_operand:SWI 1 "<general_operand>" "<r><i>,<r>m"))
|
||||
(const_int 0)))]
|
||||
"ix86_match_ccmode (insn, CCGOCmode)"
|
||||
"cmp{w}\t{%1, %0|%0, %1}"
|
||||
"cmp{<imodesuffix>}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "HI")])
|
||||
|
||||
(define_insn "*cmphi_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (match_operand:HI 0 "nonimmediate_operand" "rm,r")
|
||||
(match_operand:HI 1 "general_operand" "rn,mr")))]
|
||||
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
|
||||
&& ix86_match_ccmode (insn, CCmode)"
|
||||
"cmp{w}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "HI")])
|
||||
|
||||
(define_insn "*cmpqi_ccno_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
|
||||
(match_operand:QI 1 "const0_operand" "")))]
|
||||
"ix86_match_ccmode (insn, CCNOmode)"
|
||||
"@
|
||||
test{b}\t%0, %0
|
||||
cmp{b}\t{$0, %0|%0, 0}"
|
||||
[(set_attr "type" "test,icmp")
|
||||
(set_attr "length_immediate" "0,1")
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
(define_insn "*cmpqi_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (match_operand:QI 0 "nonimmediate_operand" "qm,q")
|
||||
(match_operand:QI 1 "general_operand" "qn,mq")))]
|
||||
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
|
||||
&& ix86_match_ccmode (insn, CCmode)"
|
||||
"cmp{b}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
(define_insn "*cmpqi_minus_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare (minus:QI (match_operand:QI 0 "nonimmediate_operand" "qm,q")
|
||||
(match_operand:QI 1 "general_operand" "qn,mq"))
|
||||
(const_int 0)))]
|
||||
"ix86_match_ccmode (insn, CCGOCmode)"
|
||||
"cmp{b}\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "icmp")
|
||||
(set_attr "mode" "QI")])
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
(define_insn "*cmpqi_ext_1"
|
||||
[(set (reg FLAGS_REG)
|
||||
@ -1211,11 +969,11 @@
|
||||
(match_operand 0 "ext_register_operand" "")
|
||||
(const_int 8)
|
||||
(const_int 8)) 0)
|
||||
(match_operand:QI 1 "general_operand" "")))]
|
||||
(match_operand:QI 1 "immediate_operand" "")))]
|
||||
""
|
||||
"")
|
||||
|
||||
(define_insn "cmpqi_ext_3_insn"
|
||||
(define_insn "*cmpqi_ext_3_insn"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare
|
||||
(subreg:QI
|
||||
@ -1230,7 +988,7 @@
|
||||
(set_attr "modrm" "1")
|
||||
(set_attr "mode" "QI")])
|
||||
|
||||
(define_insn "cmpqi_ext_3_insn_rex64"
|
||||
(define_insn "*cmpqi_ext_3_insn_rex64"
|
||||
[(set (reg FLAGS_REG)
|
||||
(compare
|
||||
(subreg:QI
|
||||
@ -19226,10 +18984,13 @@
|
||||
}
|
||||
else
|
||||
{
|
||||
rtx (*cmp_insn)(rtx, rtx);
|
||||
|
||||
if (TARGET_64BIT)
|
||||
emit_insn (gen_cmpdi_1_rex64 (countreg, countreg));
|
||||
cmp_insn = gen_cmpdi_1;
|
||||
else
|
||||
emit_insn (gen_cmpsi_1 (countreg, countreg));
|
||||
cmp_insn = gen_cmpsi_1;
|
||||
emit_insn (cmp_insn (countreg, countreg));
|
||||
emit_insn (gen_cmpstrnqi_1 (addr1, addr2, countreg, align,
|
||||
operands[1], operands[2]));
|
||||
}
|
||||
|
||||
@ -1126,23 +1126,6 @@
|
||||
(and (match_code "mult")
|
||||
(match_test "TARGET_TUNE_PROMOTE_HIMODE_IMUL"))))
|
||||
|
||||
;; To avoid problems when jump re-emits comparisons like testqi_ext_ccno_0,
|
||||
;; re-recognize the operand to avoid a copy_to_mode_reg that will fail.
|
||||
;;
|
||||
;; ??? It seems likely that this will only work because cmpsi is an
|
||||
;; expander, and no actual insns use this.
|
||||
|
||||
(define_predicate "cmpsi_operand"
|
||||
(ior (match_operand 0 "nonimmediate_operand")
|
||||
(and (match_code "and")
|
||||
(match_code "zero_extract" "0")
|
||||
(match_code "const_int" "1")
|
||||
(match_code "const_int" "01")
|
||||
(match_code "const_int" "02")
|
||||
(match_test "INTVAL (XEXP (XEXP (op, 0), 1)) == 8")
|
||||
(match_test "INTVAL (XEXP (XEXP (op, 0), 2)) == 8")
|
||||
)))
|
||||
|
||||
(define_predicate "compare_operator"
|
||||
(match_code "compare"))
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user