xtensa-protos.h (non_acc_reg_operand): Remove.
* config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove. (xtensa_valid_move, xtensa_preferred_reload_class): Define. * config/xtensa/xtensa.c (non_acc_reg_operand): Remove. (xtensa_valid_move, xtensa_preferred_reload_class): Define to prevent use of sp as a reload register. (xtensa_emit_move_sequence): Use xtensa_valid_move instead of non_acc_reg_operand. * config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand. (PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class. * config/xtensa/xtensa.md (movsi_internal, movhi_internal, movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand. From-SVN: r51201
This commit is contained in:
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41c643948c
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@ -1,3 +1,17 @@
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2002-03-22 Bob Wilson <bob.wilson@acm.org>
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* config/xtensa/xtensa-protos.h (non_acc_reg_operand): Remove.
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(xtensa_valid_move, xtensa_preferred_reload_class): Define.
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* config/xtensa/xtensa.c (non_acc_reg_operand): Remove.
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(xtensa_valid_move, xtensa_preferred_reload_class): Define to
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prevent use of sp as a reload register.
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(xtensa_emit_move_sequence): Use xtensa_valid_move instead of
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non_acc_reg_operand.
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* config/xtensa/xtensa.h (PREDICATE_CODES): Remove non_acc_reg_operand.
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(PREFERRED_RELOAD_CLASS): Move code to xtensa_preferred_reload_class.
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* config/xtensa/xtensa.md (movsi_internal, movhi_internal,
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movqi_internal): Use xtensa_valid_move instead of non_acc_reg_operand.
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2002-03-22 Neil Booth <neil@daikokuya.demon.co.uk>
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* cpphash.h (struct cpp_reader): Remove mls_line and mls_col.
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@ -43,7 +43,7 @@ extern int add_operand PARAMS ((rtx, enum machine_mode));
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extern int arith_operand PARAMS ((rtx, enum machine_mode));
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extern int nonimmed_operand PARAMS ((rtx, enum machine_mode));
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extern int mem_operand PARAMS ((rtx, enum machine_mode));
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extern int non_acc_reg_operand PARAMS ((rtx, enum machine_mode));
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extern int xtensa_valid_move PARAMS ((enum machine_mode, rtx *operands));
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extern int mask_operand PARAMS ((rtx, enum machine_mode));
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extern int extui_fldsz_operand PARAMS ((rtx, enum machine_mode));
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extern int sext_operand PARAMS ((rtx, enum machine_mode));
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@ -87,6 +87,8 @@ extern void xtensa_output_literal
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PARAMS ((FILE *, rtx, enum machine_mode, int labelno));
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extern void xtensa_reorg PARAMS ((rtx));
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extern rtx xtensa_builtin_saveregs PARAMS ((void));
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extern enum reg_class xtensa_preferred_reload_class
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PARAMS ((rtx, enum reg_class));
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extern enum reg_class xtensa_secondary_reload_class
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PARAMS ((enum reg_class, enum machine_mode, rtx, int));
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extern int a7_overlap_mentioned_p PARAMS ((rtx x));
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@ -440,12 +440,32 @@ mem_operand (op, mode)
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int
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non_acc_reg_operand (op, mode)
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rtx op;
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xtensa_valid_move (mode, operands)
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enum machine_mode mode;
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rtx *operands;
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{
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if (register_operand (op, mode))
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return !ACC_REG_P (xt_true_regnum (op));
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/* Either the destination or source must be a register, and the
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MAC16 accumulator doesn't count. */
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if (register_operand (operands[0], mode))
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{
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int dst_regnum = xt_true_regnum (operands[0]);
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/* The stack pointer can only be assigned with a MOVSP opcode. */
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if (dst_regnum == STACK_POINTER_REGNUM)
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return (mode == SImode
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&& register_operand (operands[1], mode)
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&& !ACC_REG_P (xt_true_regnum (operands[1])));
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if (!ACC_REG_P (dst_regnum))
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return true;
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}
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else if (register_operand (operands[1], mode))
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{
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int src_regnum = xt_true_regnum (operands[1]);
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if (!ACC_REG_P (src_regnum))
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return true;
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}
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return FALSE;
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}
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@ -1239,8 +1259,7 @@ xtensa_emit_move_sequence (operands, mode)
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if (!(reload_in_progress | reload_completed))
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{
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if (!non_acc_reg_operand (operands[0], mode)
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&& !non_acc_reg_operand (operands[1], mode))
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if (!xtensa_valid_move (mode, operands))
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operands[1] = force_reg (mode, operands[1]);
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/* Check if this move is copying an incoming argument in a7. If
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@ -2538,6 +2557,22 @@ xtensa_va_arg (valist, type)
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}
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enum reg_class
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xtensa_preferred_reload_class (x, class)
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rtx x;
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enum reg_class class;
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{
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if (CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
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return NO_REGS;
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/* Don't use sp for reloads! */
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if (class == AR_REGS)
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return GR_REGS;
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return class;
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}
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enum reg_class
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xtensa_secondary_reload_class (class, mode, x, isoutput)
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enum reg_class class;
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@ -708,12 +708,8 @@ extern enum reg_class xtensa_char_to_class[256];
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: ((CODE) == 'U') ? !constantpool_mem_p (OP) \
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: FALSE)
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/* Given an rtx X being reloaded into a reg required to be
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in class CLASS, return the class of reg to actually use. */
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#define PREFERRED_RELOAD_CLASS(X, CLASS) \
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(CONSTANT_P (X) \
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? (GET_CODE (X) == CONST_DOUBLE) ? NO_REGS : (CLASS) \
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: (CLASS))
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xtensa_preferred_reload_class (X, CLASS)
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#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \
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(CLASS)
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@ -1511,7 +1507,6 @@ typedef struct xtensa_args {
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{"add_operand", { REG, CONST_INT, SUBREG }}, \
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{"arith_operand", { REG, CONST_INT, SUBREG }}, \
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{"nonimmed_operand", { REG, SUBREG, MEM }}, \
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{"non_acc_reg_operand", { REG, SUBREG }}, \
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{"mem_operand", { MEM }}, \
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{"mask_operand", { REG, CONST_INT, SUBREG }}, \
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{"extui_fldsz_operand", { CONST_INT }}, \
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@ -1009,8 +1009,7 @@
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(define_insn "movsi_internal"
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[(set (match_operand:SI 0 "nonimmed_operand" "=D,D,D,D,R,R,a,q,a,a,a,U,*a,*A")
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(match_operand:SI 1 "move_operand" "M,D,d,R,D,d,r,r,I,T,U,r,*A,*r"))]
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"non_acc_reg_operand (operands[0], SImode)
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|| non_acc_reg_operand (operands[1], SImode)"
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"xtensa_valid_move (SImode, operands)"
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"@
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movi.n\\t%0, %x1
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mov.n\\t%0, %1
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@ -1045,8 +1044,7 @@
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(define_insn "movhi_internal"
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[(set (match_operand:HI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
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(match_operand:HI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
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"non_acc_reg_operand (operands[0], HImode)
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|| non_acc_reg_operand (operands[1], HImode)"
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"xtensa_valid_move (HImode, operands)"
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"@
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movi.n\\t%0, %x1
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mov.n\\t%0, %1
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@ -1075,8 +1073,7 @@
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(define_insn "movqi_internal"
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[(set (match_operand:QI 0 "nonimmed_operand" "=D,D,a,a,a,U,*a,*A")
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(match_operand:QI 1 "move_operand" "M,d,r,I,U,r,*A,*r"))]
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"non_acc_reg_operand (operands[0], QImode)
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|| non_acc_reg_operand (operands[1], QImode)"
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"xtensa_valid_move (QImode, operands)"
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"@
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movi.n\\t%0, %x1
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mov.n\\t%0, %1
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