Add -march=ia to x86 backend
* config.gcc: Support --with-cpu=ia. * config/i386/i386.c (cpu_names): Add "ia". (processor_alias_table): Likewise. (ix86_option_override_internal): Disallow -march=ia. * config/i386/i386.h (target_cpu_default): Add TARGET_CPU_DEFAULT_ia. * doc/invoke.texi: Document -mtune=ia. From-SVN: r205719
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H.J. Lu
H.J. Lu
parent
58532ca673
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a8f014d730
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@ -1,3 +1,15 @@
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2013-12-05 H.J. Lu <hongjiu.lu@intel.com>
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* config.gcc: Support --with-cpu=ia.
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* config/i386/i386.c (cpu_names): Add "ia".
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(processor_alias_table): Likewise.
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(ix86_option_override_internal): Disallow -march=ia.
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* config/i386/i386.h (target_cpu_default): Add
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TARGET_CPU_DEFAULT_ia.
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* doc/invoke.texi: Document -mtune=ia.
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2013-12-05 Vladimir Makarov <vmakarov@redhat.com>
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PR rtl-optimization/59317
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@ -1398,7 +1398,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
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TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's/^,//'`
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need_64bit_isa=yes
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case X"${with_cpu}" in
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Xgeneric|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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;;
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X)
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if test x$with_cpu_64 = x; then
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@ -1407,7 +1407,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i
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;;
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*)
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echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
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echo "generic atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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echo "generic ia atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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exit 1
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;;
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esac
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@ -1519,7 +1519,7 @@ i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
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tmake_file="$tmake_file i386/t-sol2-64"
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need_64bit_isa=yes
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case X"${with_cpu}" in
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Xgeneric|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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;;
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X)
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if test x$with_cpu_64 = x; then
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@ -1528,7 +1528,7 @@ i[34567]86-*-solaris2* | x86_64-*-solaris2.1[0-9]*)
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;;
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*)
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echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
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echo "generic atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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echo "generic ia atom slm core2 corei7 corei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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exit 1
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;;
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esac
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@ -1604,7 +1604,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
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if test x$enable_targets = xall; then
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tm_defines="${tm_defines} TARGET_BI_ARCH=1"
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case X"${with_cpu}" in
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Xgeneric|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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Xgeneric|Xia|Xatom|Xslm|Xcore2|Xcorei7|Xcorei7-avx|Xnocona|Xx86-64|Xbdver4|Xbdver3|Xbdver2|Xbdver1|Xbtver2|Xbtver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3)
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;;
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X)
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if test x$with_cpu_64 = x; then
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@ -1613,7 +1613,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*)
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;;
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*)
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echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2
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echo "generic atom slm core2 corei7 Xcorei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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echo "generic ia atom slm core2 corei7 Xcorei7-avx nocona x86-64 bdver4 bdver3 bdver2 bdver1 btver2 btver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2
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exit 1
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;;
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esac
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@ -3664,7 +3664,7 @@ case "${target}" in
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esac
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# OK
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;;
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"" | x86-64 | generic | native \
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"" | x86-64 | generic | ia | native \
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| k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \
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| opteron-sse3 | athlon-fx | bdver4 | bdver3 | bdver2 \
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| bdver1 | btver2 | btver1 | amdfam10 | barcelona \
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@ -2434,6 +2434,7 @@ static const char *const cpu_names[TARGET_CPU_DEFAULT_max] =
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"core-avx2",
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"atom",
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"slm",
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"ia",
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"geode",
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"k6",
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"k6-2",
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@ -3142,6 +3143,9 @@ ix86_option_override_internal (bool main_args_p,
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PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
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| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_AES
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| PTA_PCLMUL | PTA_RDRND | PTA_MOVBE | PTA_FXSR},
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{"ia", PROCESSOR_SLM, CPU_SLM,
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PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3
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| PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_FXSR},
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{"geode", PROCESSOR_GEODE, CPU_GEODE,
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PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_PREFETCH_SSE | PTA_PRFCHW},
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{"k6", PROCESSOR_K6, CPU_K6, PTA_MMX},
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@ -3628,6 +3632,9 @@ ix86_option_override_internal (bool main_args_p,
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if (!strcmp (opts->x_ix86_arch_string, "generic"))
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error ("generic CPU can be used only for %stune=%s %s",
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prefix, suffix, sw);
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else if (!strcmp (ix86_arch_string, "ia"))
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error ("ia CPU can be used only for %stune=%s %s",
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prefix, suffix, sw);
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else if (!strncmp (opts->x_ix86_arch_string, "generic", 7) || i == pta_size)
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error ("bad value (%s) for %sarch=%s %s",
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opts->x_ix86_arch_string, prefix, suffix, sw);
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@ -626,6 +626,7 @@ enum target_cpu_default
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TARGET_CPU_DEFAULT_haswell,
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TARGET_CPU_DEFAULT_atom,
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TARGET_CPU_DEFAULT_slm,
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TARGET_CPU_DEFAULT_ia,
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TARGET_CPU_DEFAULT_geode,
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TARGET_CPU_DEFAULT_k6,
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@ -14743,7 +14743,7 @@ then @option{-mtune=pentium4} generates code that is tuned for Pentium 4
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but still runs on i686 machines.
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The choices for @var{cpu-type} are the same as for @option{-march}.
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In addition, @option{-mtune} supports an extra choice for @var{cpu-type}:
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In addition, @option{-mtune} supports 2 extra choices for @var{cpu-type}:
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@table @samp
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@item generic
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@ -14764,6 +14764,26 @@ indicates the instruction set the compiler can use, and there is no
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generic instruction set applicable to all processors. In contrast,
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@option{-mtune} indicates the processor (or, in this case, collection of
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processors) for which the code is optimized.
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@item ia
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Produce code optimized for the most current Intel processors, which are
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Haswell and Silvermont for this version of GCC. If you know the CPU
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on which your code will run, then you should use the corresponding
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@option{-mtune} or @option{-march} option instead of @option{-mtune=ia}.
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But, if you want your application performs better on both Haswell and
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Silvermont, then you should use this option.
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As new Intel processors are deployed in the marketplace, the behavior of
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this option will change. Therefore, if you upgrade to a newer version of
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GCC, code generation controlled by this option will change to reflect
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the most current Intel processors at the time that version of GCC is
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released.
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There is no @option{-march=ia} option because @option{-march} indicates
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the instruction set the compiler can use, and there is no common
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instruction set applicable to all processors. In contrast,
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@option{-mtune} indicates the processor (or, in this case, collection of
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processors) for which the code is optimized.
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@end table
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@item -mcpu=@var{cpu-type}
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