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Check SSE and YMM state support for -march=native 

2012-10-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/54741
	*  config/i386/driver-i386.c (XCR_XFEATURE_ENABLED_MASK): New.
	(XSTATE_FP): Likewise.
	(XSTATE_SSE): Likewise.
	(XSTATE_YMM): Likewise.
	(host_detect_local_cpu): Disable AVX, AVX2, FMA, FMA4 and XOP if
	SSE and YMM states aren't supported.

From-SVN: r191998
This commit is contained in:
H.J. Lu 2012-10-02 19:49:01 +00:00 committed by H.J. Lu
parent dccb154f14
commit a91529c4eb
2 changed files with 32 additions and 0 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2012-10-02 H.J. Lu <hongjiu.lu@intel.com>
PR target/54741
* config/i386/driver-i386.c (XCR_XFEATURE_ENABLED_MASK): New.
(XSTATE_FP): Likewise.
(XSTATE_SSE): Likewise.
(XSTATE_YMM): Likewise.
(host_detect_local_cpu): Disable AVX, AVX2, FMA, FMA4 and XOP if
SSE and YMM states aren't supported.
2012-10-02 Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.md (*baddu_si_eb, *baddu_si_el): Merge into...

22
gcc/config/i386/driver-i386.c
View File

@ -390,6 +390,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_hle = 0, has_rtm = 0;
unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
unsigned int has_rdseed = 0, has_prfchw = 0, has_adx = 0;
unsigned int has_osxsave = 0;
bool arch;
@ -431,6 +432,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_sse4_1 = ecx & bit_SSE4_1;
has_sse4_2 = ecx & bit_SSE4_2;
has_avx = ecx & bit_AVX;
has_osxsave = ecx & bit_OSXSAVE;
has_cmpxchg16b = ecx & bit_CMPXCHG16B;
has_movbe = ecx & bit_MOVBE;
has_popcnt = ecx & bit_POPCNT;
@ -460,6 +462,26 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_adx = ebx & bit_ADX;
}
/* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */
#define XCR_XFEATURE_ENABLED_MASK 0x0
#define XSTATE_FP 0x1
#define XSTATE_SSE 0x2
#define XSTATE_YMM 0x4
if (has_osxsave)
asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
: "=a" (eax), "=d" (edx)
: "c" (XCR_XFEATURE_ENABLED_MASK));
/* Check if SSE and YMM states are supported. */
if ((eax & (XSTATE_SSE | XSTATE_YMM)) == (XSTATE_SSE | XSTATE_YMM))
{
has_avx = 0;
has_avx2 = 0;
has_fma = 0;
has_fma4 = 0;
has_xop = 0;
}
/* Check cpuid level of extended features. */
__cpuid (0x80000000, ext_level, ebx, ecx, edx);