sse.md (UNSPEC_MASKOP): Move from i386.md.
* config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md. (mshift): Ditto. (SWI1248_AVX512BWDQ): Ditto. (SWI1248_AVX512BW): Ditto. (k<any_logic:code><mode>): Ditto. (kandn<mode>): Ditto. (kxnor<mode>): Ditto. (knot<mode>): Ditto. (*k<any_lshift:code><mode>): Ditto. (kortestzhi, kortestchi): Ditto. (kunpckhi, kunpcksi, kunpckdi): Ditto. testsuite/ChangeLog: * gcc.target/i386/avx512f-kmovw-1.c (avx512f_test): Force value through k register. From-SVN: r242971
This commit is contained in:
Uros Bizjak
parent
28ea3e977c
commit
a918548079
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@ -1,3 +1,17 @@
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2016-11-29 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/sse.md (UNSPEC_MASKOP): Move from i386.md.
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(mshift): Ditto.
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(SWI1248_AVX512BWDQ): Ditto.
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(SWI1248_AVX512BW): Ditto.
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(k<any_logic:code><mode>): Ditto.
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(kandn<mode>): Ditto.
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(kxnor<mode>): Ditto.
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(knot<mode>): Ditto.
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(*k<any_lshift:code><mode>): Ditto.
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(kortestzhi, kortestchi): Ditto.
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(kunpckhi, kunpcksi, kunpckdi): Ditto.
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2016-11-29 Andrew Pinski <apinski@cavium.com>
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* tree-vrp.c (simplify_stmt_using_ranges): Use boolean_type_node
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@ -16,8 +30,9 @@
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* config/avr/avr-devices.c(avr_mcu_types): Add flash size info.
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* config/avr/avr-mcu.def: Likewise.
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* config/avr/gen-avr-mmcu-specs.c (print_mcu): Remove hard-coded prefix
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check to find wrap-around value, instead use MCU flash size. For 8k flash
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devices, update link_pmem_wrap spec string to add --pmem-wrap-around=8k.
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check to find wrap-around value, instead use MCU flash size. For 8k
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flash devices, update link_pmem_wrap spec string to add
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--pmem-wrap-around=8k.
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* config/avr/specs.h: Remove link_pmem_wrap from LINK_RELAX_SPEC and
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add to linker specs (LINK_SPEC) directly.
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@ -202,9 +217,8 @@
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2016-11-28 Richard Biener <rguenther@suse.de>
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* tree-vrp.c (vrp_visit_assignment_or_call): Handle
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simplifications to SSA names via extract_range_from_ssa_name
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if allowed.
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* tree-vrp.c (vrp_visit_assignment_or_call): Handle simplifications
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to SSA names via extract_range_from_ssa_name if allowed.
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2016-11-28 Richard Biener <rguenther@suse.de>
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@ -214,9 +228,8 @@
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2016-11-28 Paolo Bonzini <bonzini@gnu.org>
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* combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE
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that isolates a single bit, even if the condition involves
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subregs.
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* combine.c (simplify_if_then_else): Simplify IF_THEN_ELSE that
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isolates a single bit, even if the condition involves subregs.
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2016-11-28 Tamar Christina <tamar.christina@arm.com>
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@ -305,6 +318,7 @@
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(vdupq_laneq_p64): Likewise.
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2016-11-28 Tamar Christina <tamar.christina@arm.com>
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* config/arm/arm_neon.h (vget_lane_p64): New.
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2016-11-28 Iain Sandoe <iain@codesourcery.com>
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@ -186,9 +186,6 @@
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UNSPEC_PDEP
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UNSPEC_PEXT
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;; For AVX512F support
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UNSPEC_KMASKOP
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UNSPEC_BNDMK
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UNSPEC_BNDMK_ADDR
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UNSPEC_BNDSTX
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@ -921,9 +918,6 @@
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(define_code_attr shift [(ashift "sll") (lshiftrt "shr") (ashiftrt "sar")])
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(define_code_attr vshift [(ashift "sll") (lshiftrt "srl") (ashiftrt "sra")])
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;; Mask variant left right mnemonics
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(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
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;; Mapping of rotate operators
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(define_code_iterator any_rotate [rotate rotatert])
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@ -966,15 +960,6 @@
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;; All integer modes.
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(define_mode_iterator SWI1248x [QI HI SI DI])
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;; All integer modes with AVX512BW/DQ.
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(define_mode_iterator SWI1248_AVX512BWDQ
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[(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
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;; All integer modes with AVX512BW, where HImode operation
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;; can be used instead of QImode.
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(define_mode_iterator SWI1248_AVX512BW
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[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
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;; All integer modes without QImode.
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(define_mode_iterator SWI248x [HI SI DI])
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@ -2489,11 +2474,6 @@
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]
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(const_string "SI")))])
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(define_expand "kmovw"
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[(set (match_operand:HI 0 "nonimmediate_operand")
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(match_operand:HI 1 "nonimmediate_operand"))]
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"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
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(define_insn "*movhi_internal"
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[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k ,r,m")
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(match_operand:HI 1 "general_operand" "r ,rn,rm,rn,r,km,k,k"))]
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@ -8061,28 +8041,6 @@
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operands[3] = gen_lowpart (QImode, operands[3]);
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})
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(define_insn "k<code><mode>"
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[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
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(any_logic:SWI1248_AVX512BW
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(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")
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(match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))
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(unspec [(const_int 0)] UNSPEC_KMASKOP)]
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"TARGET_AVX512F"
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{
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if (get_attr_mode (insn) == MODE_HI)
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return "k<logic>w\t{%2, %1, %0|%0, %1, %2}";
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else
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return "k<logic><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
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}
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[(set_attr "type" "msklog")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE>mode == QImode")
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(not (match_test "TARGET_AVX512DQ")))
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(const_string "HI")
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]
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(const_string "<MODE>")))])
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;; %%% This used to optimize known byte-wide and operations to memory,
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;; and sometimes to QImode registers. If this is considered useful,
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;; it should be done with splitters.
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@ -8576,29 +8534,6 @@
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operands[2] = gen_lowpart (QImode, operands[2]);
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})
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(define_insn "kandn<mode>"
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[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
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(and:SWI1248_AVX512BW
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(not:SWI1248_AVX512BW
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(match_operand:SWI1248_AVX512BW 1 "register_operand" "k"))
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(match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))
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(unspec [(const_int 0)] UNSPEC_KMASKOP)]
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"TARGET_AVX512F"
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{
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if (get_attr_mode (insn) == MODE_HI)
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return "kandnw\t{%2, %1, %0|%0, %1, %2}";
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else
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return "kandn<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
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}
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[(set_attr "type" "msklog")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE>mode == QImode")
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(not (match_test "TARGET_AVX512DQ")))
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(const_string "HI")
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]
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(const_string "<MODE>")))])
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(define_insn_and_split "*andndi3_doubleword"
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[(set (match_operand:DI 0 "register_operand" "=r")
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(and:DI
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@ -8987,92 +8922,6 @@
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(set_attr "type" "alu")
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(set_attr "modrm" "1")
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(set_attr "mode" "QI")])
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(define_insn "kxnor<mode>"
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[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
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(not:SWI1248_AVX512BW
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(xor:SWI1248_AVX512BW
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(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")
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(match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))))
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(unspec [(const_int 0)] UNSPEC_KMASKOP)]
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"TARGET_AVX512F"
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{
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if (get_attr_mode (insn) == MODE_HI)
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return "kxnorw\t{%2, %1, %0|%0, %1, %2}";
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else
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return "kxnor<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
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}
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[(set_attr "type" "msklog")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE>mode == QImode")
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(not (match_test "TARGET_AVX512DQ")))
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(const_string "HI")
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]
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(const_string "<MODE>")))])
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;;There are kortrest[bdq] but no intrinsics for them.
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;;We probably don't need to implement them.
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(define_insn "kortestzhi"
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[(set (reg:CCZ FLAGS_REG)
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(compare:CCZ
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(ior:HI
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(match_operand:HI 0 "register_operand" "k")
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(match_operand:HI 1 "register_operand" "k"))
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(const_int 0)))]
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"TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)"
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"kortestw\t{%1, %0|%0, %1}"
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[(set_attr "mode" "HI")
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(set_attr "type" "msklog")
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(set_attr "prefix" "vex")])
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(define_insn "kortestchi"
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[(set (reg:CCC FLAGS_REG)
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(compare:CCC
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(ior:HI
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(match_operand:HI 0 "register_operand" "k")
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(match_operand:HI 1 "register_operand" "k"))
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(const_int -1)))]
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"TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)"
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"kortestw\t{%1, %0|%0, %1}"
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[(set_attr "mode" "HI")
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(set_attr "type" "msklog")
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(set_attr "prefix" "vex")])
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(define_insn "kunpckhi"
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[(set (match_operand:HI 0 "register_operand" "=k")
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(ior:HI
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(ashift:HI
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(zero_extend:HI (match_operand:QI 1 "register_operand" "k"))
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(const_int 8))
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(zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))]
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"TARGET_AVX512F"
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"kunpckbw\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "mode" "HI")
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(set_attr "type" "msklog")
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(set_attr "prefix" "vex")])
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(define_insn "kunpcksi"
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[(set (match_operand:SI 0 "register_operand" "=k")
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(ior:SI
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(ashift:SI
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(zero_extend:SI (match_operand:HI 1 "register_operand" "k"))
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(const_int 16))
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(zero_extend:SI (match_operand:HI 2 "register_operand" "k"))))]
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"TARGET_AVX512BW"
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"kunpckwd\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "mode" "SI")])
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(define_insn "kunpckdi"
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[(set (match_operand:DI 0 "register_operand" "=k")
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(ior:DI
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(ashift:DI
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(zero_extend:DI (match_operand:SI 1 "register_operand" "k"))
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(const_int 32))
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(zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))]
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"TARGET_AVX512BW"
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"kunpckdq\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "mode" "DI")])
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;; Negation instructions
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@ -9463,27 +9312,6 @@
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;; One complement instructions
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(define_insn "knot<mode>"
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[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
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(not:SWI1248_AVX512BW
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(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")))
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(unspec [(const_int 0)] UNSPEC_KMASKOP)]
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"TARGET_AVX512F"
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{
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if (get_attr_mode (insn) == MODE_HI)
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return "knotw\t{%1, %0|%0, %1}";
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else
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return "knot<mskmodesuffix>\t{%1, %0|%0, %1}";
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}
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[(set_attr "type" "msklog")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(cond [(and (match_test "<MODE>mode == QImode")
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(not (match_test "TARGET_AVX512DQ")))
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(const_string "HI")
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]
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(const_string "<MODE>")))])
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(define_expand "one_cmpl<mode>2"
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[(set (match_operand:SWIM 0 "nonimmediate_operand")
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(not:SWIM (match_operand:SWIM 1 "nonimmediate_operand")))]
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@ -9600,18 +9428,6 @@
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;; shift pair, instead using moves and sign extension for counts greater
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;; than 31.
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(define_insn "*k<code><mode>"
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[(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
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(any_lshift:SWI1248_AVX512BWDQ
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(match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
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(match_operand:QI 2 "immediate_operand" "n")))
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(unspec [(const_int 0)] UNSPEC_KMASKOP)]
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"TARGET_AVX512F"
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"k<mshift><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "msklog")
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(set_attr "prefix" "vex")
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(set_attr "mode" "<MODE>")])
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|
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(define_expand "ashl<mode>3"
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[(set (match_operand:SDWIM 0 "<shift_operand>")
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(ashift:SDWIM (match_operand:SDWIM 1 "<ashl_input_operand>")
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|
|
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|
|
@ -106,6 +106,9 @@
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UNSPEC_MASKED_EQ
|
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UNSPEC_MASKED_GT
|
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|
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;; Mask operations
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UNSPEC_MASKOP
|
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|
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;; For embed. rounding feature
|
||||
UNSPEC_EMBEDDED_ROUNDING
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|
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|
|
@ -1288,6 +1291,195 @@
|
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UNSPEC_MOVNT))]
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"TARGET_SSE")
|
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|
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Mask operations
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;;
|
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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|
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;; All integer modes with AVX512BW/DQ.
|
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(define_mode_iterator SWI1248_AVX512BWDQ
|
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[(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
|
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|
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;; All integer modes with AVX512BW, where HImode operation
|
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;; can be used instead of QImode.
|
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(define_mode_iterator SWI1248_AVX512BW
|
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[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
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|
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;; Mask variant shift mnemonics
|
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(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
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|
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(define_expand "kmovw"
|
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[(set (match_operand:HI 0 "nonimmediate_operand")
|
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(match_operand:HI 1 "nonimmediate_operand"))]
|
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"TARGET_AVX512F
|
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&& !(MEM_P (operands[0]) && MEM_P (operands[1]))")
|
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|
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(define_insn "k<code><mode>"
|
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[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
|
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(any_logic:SWI1248_AVX512BW
|
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(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")
|
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(match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))
|
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(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
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"TARGET_AVX512F"
|
||||
{
|
||||
if (get_attr_mode (insn) == MODE_HI)
|
||||
return "k<logic>w\t{%2, %1, %0|%0, %1, %2}";
|
||||
else
|
||||
return "k<logic><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
|
||||
}
|
||||
[(set_attr "type" "msklog")
|
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(set_attr "prefix" "vex")
|
||||
(set (attr "mode")
|
||||
(cond [(and (match_test "<MODE>mode == QImode")
|
||||
(not (match_test "TARGET_AVX512DQ")))
|
||||
(const_string "HI")
|
||||
]
|
||||
(const_string "<MODE>")))])
|
||||
|
||||
(define_insn "kandn<mode>"
|
||||
[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
|
||||
(and:SWI1248_AVX512BW
|
||||
(not:SWI1248_AVX512BW
|
||||
(match_operand:SWI1248_AVX512BW 1 "register_operand" "k"))
|
||||
(match_operand:SWI1248_AVX512BW 2 "register_operand" "k")))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512F"
|
||||
{
|
||||
if (get_attr_mode (insn) == MODE_HI)
|
||||
return "kandnw\t{%2, %1, %0|%0, %1, %2}";
|
||||
else
|
||||
return "kandn<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
|
||||
}
|
||||
[(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")
|
||||
(set (attr "mode")
|
||||
(cond [(and (match_test "<MODE>mode == QImode")
|
||||
(not (match_test "TARGET_AVX512DQ")))
|
||||
(const_string "HI")
|
||||
]
|
||||
(const_string "<MODE>")))])
|
||||
|
||||
(define_insn "kxnor<mode>"
|
||||
[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
|
||||
(not:SWI1248_AVX512BW
|
||||
(xor:SWI1248_AVX512BW
|
||||
(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")
|
||||
(match_operand:SWI1248_AVX512BW 2 "register_operand" "k"))))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512F"
|
||||
{
|
||||
if (get_attr_mode (insn) == MODE_HI)
|
||||
return "kxnorw\t{%2, %1, %0|%0, %1, %2}";
|
||||
else
|
||||
return "kxnor<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
|
||||
}
|
||||
[(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")
|
||||
(set (attr "mode")
|
||||
(cond [(and (match_test "<MODE>mode == QImode")
|
||||
(not (match_test "TARGET_AVX512DQ")))
|
||||
(const_string "HI")
|
||||
]
|
||||
(const_string "<MODE>")))])
|
||||
|
||||
(define_insn "knot<mode>"
|
||||
[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=k")
|
||||
(not:SWI1248_AVX512BW
|
||||
(match_operand:SWI1248_AVX512BW 1 "register_operand" "k")))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512F"
|
||||
{
|
||||
if (get_attr_mode (insn) == MODE_HI)
|
||||
return "knotw\t{%1, %0|%0, %1}";
|
||||
else
|
||||
return "knot<mskmodesuffix>\t{%1, %0|%0, %1}";
|
||||
}
|
||||
[(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")
|
||||
(set (attr "mode")
|
||||
(cond [(and (match_test "<MODE>mode == QImode")
|
||||
(not (match_test "TARGET_AVX512DQ")))
|
||||
(const_string "HI")
|
||||
]
|
||||
(const_string "<MODE>")))])
|
||||
|
||||
(define_insn "*k<code><mode>"
|
||||
[(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
|
||||
(any_lshift:SWI1248_AVX512BWDQ
|
||||
(match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
|
||||
(match_operand:QI 2 "immediate_operand" "n")))
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)]
|
||||
"TARGET_AVX512F"
|
||||
"k<mshift><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
|
||||
[(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
;;There are kortrest[bdq] but no intrinsics for them.
|
||||
;;We probably don't need to implement them.
|
||||
(define_insn "kortestzhi"
|
||||
[(set (reg:CCZ FLAGS_REG)
|
||||
(compare:CCZ
|
||||
(ior:HI
|
||||
(match_operand:HI 0 "register_operand" "k")
|
||||
(match_operand:HI 1 "register_operand" "k"))
|
||||
(const_int 0)))]
|
||||
"TARGET_AVX512F && ix86_match_ccmode (insn, CCZmode)"
|
||||
"kortestw\t{%1, %0|%0, %1}"
|
||||
[(set_attr "mode" "HI")
|
||||
(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")])
|
||||
|
||||
(define_insn "kortestchi"
|
||||
[(set (reg:CCC FLAGS_REG)
|
||||
(compare:CCC
|
||||
(ior:HI
|
||||
(match_operand:HI 0 "register_operand" "k")
|
||||
(match_operand:HI 1 "register_operand" "k"))
|
||||
(const_int -1)))]
|
||||
"TARGET_AVX512F && ix86_match_ccmode (insn, CCCmode)"
|
||||
"kortestw\t{%1, %0|%0, %1}"
|
||||
[(set_attr "mode" "HI")
|
||||
(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")])
|
||||
|
||||
(define_insn "kunpckhi"
|
||||
[(set (match_operand:HI 0 "register_operand" "=k")
|
||||
(ior:HI
|
||||
(ashift:HI
|
||||
(zero_extend:HI (match_operand:QI 1 "register_operand" "k"))
|
||||
(const_int 8))
|
||||
(zero_extend:HI (match_operand:QI 2 "register_operand" "k"))))]
|
||||
"TARGET_AVX512F"
|
||||
"kunpckbw\t{%2, %1, %0|%0, %1, %2}"
|
||||
[(set_attr "mode" "HI")
|
||||
(set_attr "type" "msklog")
|
||||
(set_attr "prefix" "vex")])
|
||||
|
||||
(define_insn "kunpcksi"
|
||||
[(set (match_operand:SI 0 "register_operand" "=k")
|
||||
(ior:SI
|
||||
(ashift:SI
|
||||
(zero_extend:SI (match_operand:HI 1 "register_operand" "k"))
|
||||
(const_int 16))
|
||||
(zero_extend:SI (match_operand:HI 2 "register_operand" "k"))))]
|
||||
"TARGET_AVX512BW"
|
||||
"kunpckwd\t{%2, %1, %0|%0, %1, %2}"
|
||||
[(set_attr "mode" "SI")])
|
||||
|
||||
(define_insn "kunpckdi"
|
||||
[(set (match_operand:DI 0 "register_operand" "=k")
|
||||
(ior:DI
|
||||
(ashift:DI
|
||||
(zero_extend:DI (match_operand:SI 1 "register_operand" "k"))
|
||||
(const_int 32))
|
||||
(zero_extend:DI (match_operand:SI 2 "register_operand" "k"))))]
|
||||
"TARGET_AVX512BW"
|
||||
"kunpckdq\t{%2, %1, %0|%0, %1, %2}"
|
||||
[(set_attr "mode" "DI")])
|
||||
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Parallel floating point arithmetic
|
||||
|
|
@ -13716,7 +13908,7 @@
|
|||
[(set (subreg:HI (match_operand:QI 0 "register_operand") 0)
|
||||
(lshiftrt:HI (match_operand:HI 1 "register_operand")
|
||||
(const_int 8)))
|
||||
(unspec [(const_int 0)] UNSPEC_KMASKOP)])]
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512F")
|
||||
|
||||
(define_expand "vec_unpacks_hi_<mode>"
|
||||
|
|
@ -13725,7 +13917,7 @@
|
|||
(match_operand:<HALFMASKMODE> 0 "register_operand") 0)
|
||||
(lshiftrt:SWI48x (match_operand:SWI48x 1 "register_operand")
|
||||
(match_dup 2)))
|
||||
(unspec [(const_int 0)] UNSPEC_KMASKOP)])]
|
||||
(unspec [(const_int 0)] UNSPEC_MASKOP)])]
|
||||
"TARGET_AVX512BW"
|
||||
"operands[2] = GEN_INT (GET_MODE_BITSIZE (<HALFMASKMODE>mode));")
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2016-11-29 Uros Bizjak <ubizjak@gmail.com>
|
||||
|
||||
* gcc.target/i386/avx512f-kmovw-1.c (avx512f_test):
|
||||
Force value through k register.
|
||||
|
||||
2016-11-29 David Malcolm <dmalcolm@redhat.com>
|
||||
|
||||
PR c++/72774
|
||||
|
|
|
|||
|
|
@ -8,5 +8,8 @@ volatile __mmask16 k1;
|
|||
void
|
||||
avx512f_test ()
|
||||
{
|
||||
k1 = _mm512_kmov (11);
|
||||
__mmask16 k = _mm512_kmov (11);
|
||||
|
||||
asm volatile ("" : "+k" (k));
|
||||
k1 = k;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue