OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

fr30.h: Fix comment typos. 

* config/fr30/fr30.h: Fix comment typos.
	* config/frv/frv.c: Likewise.
	* config/i386/xmmintrin.h: Likewise.
	* config/mips/mips.c: Likewise.
	* config/sh/sh.c: Likewise.

From-SVN: r57144
This commit is contained in:
Kazu Hirata 2002-09-14 13:39:55 +00:00 committed by Kazu Hirata
parent 88cad84baf
commit a920aefe8d
6 changed files with 13 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
gcc/ChangeLog
View File

@ -1,3 +1,11 @@
2002-09-14 Kazu Hirata <kazu@cs.umass.edu>
* config/fr30/fr30.h: Fix comment typos.
* config/frv/frv.c: Likewise.
* config/i386/xmmintrin.h: Likewise.
* config/mips/mips.c: Likewise.
* config/sh/sh.c: Likewise.
2002-09-14 Kazu Hirata <kazu@cs.umass.edu>
* haifa-sched.c: Follow spelling conventions.

2
gcc/config/fr30/fr30.h
View File

@ -992,7 +992,7 @@ do \
* indexed addressing using small signed offsets from the frame pointer
* register plus register addresing using R13 as the base register.
* register plus register addressing using R13 as the base register.
At the moment we only support the first two of these special cases. */

2
gcc/config/frv/frv.c
View File

@ -3552,7 +3552,7 @@ frv_legitimize_address (x, oldx, mode)
{
rtx ret = NULL_RTX;
/* Don't try to legitimize addreses if we are not optimizing, since the
/* Don't try to legitimize addresses if we are not optimizing, since the
address we generate is not a general operand, and will horribly mess
things up when force_reg is called to try and put it in a register because
we aren't optimizing. */

2
gcc/config/i386/xmmintrin.h
View File

@ -871,7 +871,7 @@ _mm_storeu_ps (float *__P, __m128 __A)
__builtin_ia32_storeups (__P, (__v4sf)__A);
}
/* Store four SPFP values in reverse order. The addres must be aligned. */
/* Store four SPFP values in reverse order. The address must be aligned. */
static __inline void
_mm_storer_ps (float *__P, __m128 __A)
{

2
gcc/config/mips/mips.c
View File

@ -8092,7 +8092,7 @@ mips_select_section (decl, reloc, align)
precisely correct.
When not mips16 code nor embedded PIC, if a symbol is in a
gp addresable section, SYMBOL_REF_FLAG is set prevent gcc from
gp addressable section, SYMBOL_REF_FLAG is set prevent gcc from
splitting the reference so that gas can generate a gp relative
reference.

2
gcc/config/sh/sh.c
View File

@ -3862,7 +3862,7 @@ machine_dependent_reorg (first)
split_branches (first);
/* The INSN_REFERENCES_ARE_DELAYED in sh.h is problematic because it
also has an effect on the register that holds the addres of the sfunc.
also has an effect on the register that holds the address of the sfunc.
Insert an extra dummy insn in front of each sfunc that pretends to
use this register. */
if (flag_delayed_branch)