OpenE2K/gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

re PR testsuite/20772 (x86 tests should run on both i?86 and x86_64)

Browse Source 
PR testsuite/20772
	* g++.dg/eh/simd-1.C, g++.dg/eh/simd-2.C, g++.dg/opt/inline9.C,
	gcc.dg/20020418-1.c, gcc.dg/20031102-1.c, gcc.dg/ia64-sync-1.c,
	gcc.dg/ia64-sync-2.c, gcc.dg/ia64-sync-3.c, gcc.dg/ia64-sync-4.c,
	gcc.dg/ifcvt-fabs-1.c, gcc.dg/loop-3.c, gcc.dg/nested-calls-1.c,
	gcc.dg/pr20017.c, gcc.dg/smod-1.c, gcc.dg/sync-2.c,
	gcc.dg/tls/opt-3.c, gcc.dg/torture/badshift.c: Add x86_64 cases
	and/or merge with i?86 cases.

	* gcc.dg/tls/opt-3.c: Require effective target fpic.

From-SVN: r108324
This commit is contained in:
Kaveh R. Ghazi 2005-12-09 23:46:42 +00:00 committed by Kaveh Ghazi
parent 27b7cbdfbd
commit a94d6f3b22
18 changed files with 29 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
gcc/testsuite/ChangeLog
View File

@ -1,5 +1,16 @@
2005-12-09 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
PR testsuite/20772
* g++.dg/eh/simd-1.C, g++.dg/eh/simd-2.C, g++.dg/opt/inline9.C,
gcc.dg/20020418-1.c, gcc.dg/20031102-1.c, gcc.dg/ia64-sync-1.c,
gcc.dg/ia64-sync-2.c, gcc.dg/ia64-sync-3.c, gcc.dg/ia64-sync-4.c,
gcc.dg/ifcvt-fabs-1.c, gcc.dg/loop-3.c, gcc.dg/nested-calls-1.c,
gcc.dg/pr20017.c, gcc.dg/smod-1.c, gcc.dg/sync-2.c,
gcc.dg/tls/opt-3.c, gcc.dg/torture/badshift.c: Add x86_64 cases
and/or merge with i?86 cases.
* gcc.dg/tls/opt-3.c: Require effective target fpic.
PR testsuite/20772
* g++.dg/opt/life1.C, g++.old-deja/g++.abi/aggregates.C,
g++.old-deja/g++.abi/align.C, g++.old-deja/g++.abi/bitfields.C,

3
gcc/testsuite/g++.dg/eh/simd-1.C
View File

@ -1,8 +1,7 @@
// Test EH when V2SI SIMD registers are involved.
// Contributed by Aldy Hernandez (aldy@quesejoda.com).
// { dg-options "-O" }
// { dg-options "-O -w" { target i?86-*-* } }
// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } }
// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
// { dg-do run }
typedef int __attribute__((vector_size (8))) vecint;

3
gcc/testsuite/g++.dg/eh/simd-2.C
View File

@ -1,8 +1,7 @@
// Test EH when V4SI SIMD registers are involved.
// Contributed by Aldy Hernandez (aldy@quesejoda.com).
// { dg-options "-O" }
// { dg-options "-O -w" { target i?86-*-* } }
// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } }
// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
// { dg-options "-O -w -maltivec" { target powerpc*-*-linux* } }
// { dg-xfail-if "" { "powerpc-*-eabispe*" "powerpc-ibm-aix*" } { "*" } { "" } }
// { dg-do run }

2
gcc/testsuite/g++.dg/opt/inline9.C
View File

@ -3,7 +3,7 @@
// Testcase by Alan Modra <amodra@bigpond.net.au>
// { dg-do run }
// { dg-options "-O" }
// { dg-options "-O -mtune=i686" { target i?86-*-* } }
// { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
struct thread_info
{

2
gcc/testsuite/gcc.dg/20020418-1.c
View File

@ -1,7 +1,7 @@
/* PR optimization/5887 */
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -msse -ffast-math" { target i?86-*-* } } */
/* { dg-options "-O2 -msse -ffast-math" { target i?86-*-* x86_64-*-* } } */
void bar (float *a, float *b);

2
gcc/testsuite/gcc.dg/20031102-1.c
View File

@ -3,7 +3,7 @@
/* { dg-do run } */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -march=i686" { target i686-*-* } } */
/* { dg-options "-O2 -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
/* Verify that reload_cse_move2add doesn't add unexpected CLOBBERs. */

3
gcc/testsuite/gcc.dg/ia64-sync-1.c
View File

@ -1,8 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target sync_int_long } */
/* { dg-options } */
/* { dg-options "-march=i486" { target i?86-*-* } } */
/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* Test basic functionality of the intrinsics. The operations should
not be optimized away if no one checks the return values. */

3
gcc/testsuite/gcc.dg/ia64-sync-2.c
View File

@ -1,8 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target sync_int_long } */
/* { dg-options } */
/* { dg-options "-march=i486" { target i?86-*-* } } */
/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* Test basic functionality of the intrinsics. */

3
gcc/testsuite/gcc.dg/ia64-sync-3.c
View File

@ -1,8 +1,7 @@
/* { dg-do run } */
/* { dg-require-effective-target sync_int_long } */
/* { dg-options } */
/* { dg-options "-march=i486" { target i?86-*-* } } */
/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* Test basic functionality of the intrinsics. */

3
gcc/testsuite/gcc.dg/ia64-sync-4.c
View File

@ -1,8 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target sync_int_long } */
/* { dg-options "-O2 -finline-functions" } */
/* { dg-options "-march=i486" { target i?86-*-* } } */
/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* Test inlining __sync_bool_compare_and_swap. */

2
gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
View File

@ -1,6 +1,6 @@
/* { dg-do run } */
/* { dg-options "-O" } */
/* { dg-options "-O -march=i686" { target i686-*-* } } */
/* { dg-options "-O -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
extern void abort(void);

2
gcc/testsuite/gcc.dg/loop-3.c
View File

@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O3" } */
/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-O3 -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
#if defined(STACK_SIZE) && (STACK_SIZE < 65536)
# define BYTEMEM_SIZE 10000L

2
gcc/testsuite/gcc.dg/nested-calls-1.c
View File

@ -3,7 +3,7 @@
/* { dg-do run } */
/* { dg-options "-std=c99 -O -fno-inline" } */
/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
#include <limits.h>

2
gcc/testsuite/gcc.dg/pr20017.c
View File

@ -6,7 +6,7 @@
/* { dg-do compile } */
/* { dg-options "-O1" } */
/* { dg-options "-O1 -march=i386" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-O1 -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
int
foo (int *buf, int *p)

2
gcc/testsuite/gcc.dg/smod-1.c
View File

@ -3,7 +3,7 @@
/* { dg-do run } */
/* { dg-options "-std=c99" } */
/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-std=c99 -mtune=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
#include <limits.h>

3
gcc/testsuite/gcc.dg/sync-2.c
View File

@ -1,7 +1,6 @@
/* { dg-do run } */
/* { dg-require-effective-target sync_char_short } */
/* { dg-options "-march=i486" { target i?86-*-* } } */
/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* Test functionality of the intrinsics for 'short' and 'char'. */

3
gcc/testsuite/gcc.dg/tls/opt-3.c
View File

@ -1,7 +1,8 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fpic" } */
/* { dg-options "-O2 -fpic -mregparm=3" { target i?86-*-* } } */
/* { dg-options "-O2 -fpic -mregparm=3" { target i?86-*-* x86_64-*-* } } */
/* { dg-require-effective-target tls } */
/* { dg-require-effective-target fpic } */
extern __thread int i, j, k;
extern void bar(int *, int *, int *);

2
gcc/testsuite/gcc.dg/torture/badshift.c
View File

@ -2,7 +2,7 @@
/* { dg-do run } */
/* { dg-options "" } */
/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
/* We used to optimize the DImode shift-by-32 to zero because in combine
we turned: