re PR target/67391 ([SH] Convert clrt addc to normal add insn)
gcc/ PR target/67391 * config/sh/sh-protos.h (sh_lra_p): Declare. * config/sh/sh.c (sh_lra_p): Make non-static. * config/sh/sh.md (addsi3): Use arith_reg_dest for operands[0] and arith_reg_operand for operands[1]. Remove TARGET_SHMEDIA case. Expand into addsi3_scr if operands[2] if needed. (*addsi3_compact): Rename to *addsi3_compact_lra. Use arith_reg_operand for operands[1]. Allow it only when LRA is enabled. (addsi3_scr, *addsi3): New insn_and_split patterns. Co-Authored-By: Kaz Kojima <kkojima@gcc.gnu.org> From-SVN: r228176
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Oleg Endo
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f11a7b6d57
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a981b74355
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@ -1,3 +1,16 @@
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2015-09-27 Oleg Endo <olegendo@gcc.gnu.org>
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Kaz Kojima <kkojima@gcc.gnu.org>
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PR target/67391
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* config/sh/sh-protos.h (sh_lra_p): Declare.
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* config/sh/sh.c (sh_lra_p): Make non-static.
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* config/sh/sh.md (addsi3): Use arith_reg_dest for operands[0] and
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arith_reg_operand for operands[1]. Remove TARGET_SHMEDIA case.
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Expand into addsi3_scr if operands[2] if needed.
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(*addsi3_compact): Rename to *addsi3_compact_lra. Use
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arith_reg_operand for operands[1]. Allow it only when LRA is enabled.
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(addsi3_scr, *addsi3): New insn_and_split patterns.
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2015-09-27 Alexandre Oliva <aoliva@redhat.com>
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PR rtl-optimization/64164
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@ -93,6 +93,7 @@ extern rtx sh_fsca_sf2int (void);
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extern rtx sh_fsca_int2sf (void);
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/* Declare functions defined in sh.c and used in templates. */
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extern bool sh_lra_p (void);
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extern const char *output_branch (int, rtx_insn *, rtx *);
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extern const char *output_ieee_ccmpeq (rtx_insn *, rtx *);
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@ -216,7 +216,6 @@ static int sh_mode_after (int, int, rtx_insn *);
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static int sh_mode_entry (int);
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static int sh_mode_exit (int);
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static int sh_mode_priority (int entity, int n);
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static bool sh_lra_p (void);
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static rtx mark_constant_pool_use (rtx);
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static tree sh_handle_interrupt_handler_attribute (tree *, tree, tree,
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@ -14507,7 +14506,7 @@ sh_mode_priority (int entity ATTRIBUTE_UNUSED, int n)
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*/
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/* Return true if we use LRA instead of reload pass. */
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static bool
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bool
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sh_lra_p (void)
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{
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return sh_lra_flag;
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@ -2122,13 +2122,19 @@
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})
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(define_expand "addsi3"
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[(set (match_operand:SI 0 "arith_reg_operand" "")
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(plus:SI (match_operand:SI 1 "arith_operand" "")
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(match_operand:SI 2 "arith_or_int_operand" "")))]
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[(set (match_operand:SI 0 "arith_reg_dest")
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(plus:SI (match_operand:SI 1 "arith_reg_operand")
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(match_operand:SI 2 "arith_or_int_operand")))]
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""
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{
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if (TARGET_SHMEDIA)
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operands[1] = force_reg (SImode, operands[1]);
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if (TARGET_SH1 && !arith_operand (operands[2], SImode))
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{
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if (!sh_lra_p () || reg_overlap_mentioned_p (operands[0], operands[1]))
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{
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emit_insn (gen_addsi3_scr (operands[0], operands[1], operands[2]));
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DONE;
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}
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}
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})
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(define_insn "addsi3_media"
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@ -2163,15 +2169,22 @@
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;; copy or constant load before the actual add insn.
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;; Use u constraint for that case to avoid the invalid value in the stack
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;; pointer.
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(define_insn_and_split "*addsi3_compact"
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;; This also results in better code when LRA is not used. However, we have
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;; to use different sets of patterns and the order of these patterns is
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;; important.
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;; In some cases the constant zero might end up in operands[2] of the
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;; patterns. We have to accept that and convert it into a reg-reg move.
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(define_insn_and_split "*addsi3_compact_lra"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r,&u")
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(plus:SI (match_operand:SI 1 "arith_operand" "%0,r")
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(plus:SI (match_operand:SI 1 "arith_reg_operand" "%0,r")
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(match_operand:SI 2 "arith_or_int_operand" "rI08,rn")))]
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"TARGET_SH1"
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"TARGET_SH1 && sh_lra_p ()
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&& (! reg_overlap_mentioned_p (operands[0], operands[1])
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|| arith_operand (operands[2], SImode))"
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"@
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add %2,%0
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#"
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"reload_completed
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"&& reload_completed
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&& ! reg_overlap_mentioned_p (operands[0], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1)))]
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@ -2182,6 +2195,58 @@
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}
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[(set_attr "type" "arith")])
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(define_insn_and_split "addsi3_scr"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r,&u,&u")
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(plus:SI (match_operand:SI 1 "arith_reg_operand" "%0,r,r")
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(match_operand:SI 2 "arith_or_int_operand" "rI08,r,n")))
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(clobber (match_scratch:SI 3 "=X,X,&u"))]
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"TARGET_SH1"
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"@
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add %2,%0
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#
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#"
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"&& reload_completed"
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[(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 2)))]
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{
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if (operands[2] == const0_rtx)
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{
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emit_move_insn (operands[0], operands[1]);
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DONE;
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}
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if (CONST_INT_P (operands[2]) && !satisfies_constraint_I08 (operands[2]))
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{
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if (reg_overlap_mentioned_p (operands[0], operands[1]))
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{
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emit_move_insn (operands[3], operands[2]);
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emit_move_insn (operands[0], operands[1]);
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operands[2] = operands[3];
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}
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else
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{
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emit_move_insn (operands[0], operands[2]);
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operands[2] = operands[1];
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}
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}
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else if (!reg_overlap_mentioned_p (operands[0], operands[1]))
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emit_move_insn (operands[0], operands[1]);
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}
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[(set_attr "type" "arith")])
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(define_insn_and_split "*addsi3"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
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(plus:SI (match_operand:SI 1 "arith_reg_operand" "%0,r")
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(match_operand:SI 2 "arith_operand" "rI08,Z")))]
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"TARGET_SH1 && !sh_lra_p ()"
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"@
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add %2,%0
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#"
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"&& operands[2] == const0_rtx"
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[(set (match_dup 0) (match_dup 1))]
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{
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}
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[(set_attr "type" "arith")])
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;; -------------------------------------------------------------------------
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;; Subtraction instructions
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;; -------------------------------------------------------------------------
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