* sh.md (mulsi3): Tag an extra REG_EQUAL note to the middle insn.

From-SVN: r26055
This commit is contained in:
J"orn Rennecke 1999-03-29 11:39:22 +00:00 committed by Joern Rennecke
parent 51c2de46b8
commit aa4778b684
2 changed files with 14 additions and 1 deletions

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@ -1,3 +1,7 @@
Mon Mar 29 20:35:49 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
* sh.md (mulsi3): Tag an extra REG_EQUAL note to the middle insn.
Mon Mar 29 11:50:34 1999 Jerry Quinn <jquinn@nortelnetworks.com>
* pa.h (HAVE_PRE_INCREMENT): Disable when optimizing for a PA8000

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@ -1112,8 +1112,17 @@
else
{
rtx macl = gen_rtx_REG (SImode, MACL_REG);
rtx giv_insn;
first = emit_insn (gen_mul_l (operands[1], operands[2]));
emit_insn (gen_movsi_i ((operands[0]), macl));
/* consec_sets_giv can only recognize the first insn that sets a
giv as the giv insn. So we must tag this also with a REG_EQUAL
note. */
giv_insn = emit_insn (gen_movsi_i ((operands[0]), macl));
REG_NOTES (giv_insn)
= gen_rtx_EXPR_LIST (REG_EQUAL,
gen_rtx_MULT (SImode, operands[1], operands[2]),
REG_NOTES (giv_insn));
/* The sequence must end in a no-op move, lest cse puts macl in its
tables and does invalid substitutions. */
last = emit_insn (gen_movsi_i ((operands[0]), operands[0]));