re PR target/62631 (gcc.dg/tree-ssa/ivopts-lt-2.c FAILs)

PR target/62631
	* config/sparc/sparc.h (TARGET_HARD_MUL): Remove TARGET_V8PLUS.
	(TARGET_HARD_MUL32): Rewrite based on TARGET_HARD_MUL.
	* config/sparc/sparc.c (sparc_rtx_costs) <MULT>: Return costs based on
	int_mulX for integers in 64-bit mode if TARGET_HARD_MUL is not set.

From-SVN: r220369
This commit is contained in:
Eric Botcazou 2015-02-03 09:56:45 +00:00 committed by Eric Botcazou
parent 76f0aa6c5a
commit aa47faf097
3 changed files with 22 additions and 16 deletions

View File

@ -1,3 +1,11 @@
2015-02-03 Eric Botcazou <ebotcazou@adacore.com>
PR target/62631
* config/sparc/sparc.h (TARGET_HARD_MUL): Remove TARGET_V8PLUS.
(TARGET_HARD_MUL32): Rewrite based on TARGET_HARD_MUL.
* config/sparc/sparc.c (sparc_rtx_costs) <MULT>: Return costs based on
int_mulX for integers in 64-bit mode if TARGET_HARD_MUL is not set.
2015-02-03 Jakub Jelinek <jakub@redhat.com>
PR other/63504

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@ -11075,7 +11075,7 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
case MULT:
if (float_mode_p)
*total = sparc_costs->float_mul;
else if (! TARGET_HARD_MUL)
else if (TARGET_ARCH32 && !TARGET_HARD_MUL)
*total = COSTS_N_INSNS (25);
else
{
@ -11113,7 +11113,7 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
bit_cost = COSTS_N_INSNS (bit_cost);
}
if (mode == DImode)
if (mode == DImode || !TARGET_HARD_MUL)
*total = sparc_costs->int_mulX + bit_cost;
else
*total = sparc_costs->int_mul + bit_cost;

View File

@ -426,22 +426,20 @@ extern enum cmodel sparc_cmodel;
#define WCHAR_TYPE_SIZE 16
/* Mask of all CPU selection flags. */
#define MASK_ISA \
(MASK_V8 + MASK_SPARCLITE + MASK_SPARCLET + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
#define MASK_ISA \
(MASK_SPARCLITE + MASK_SPARCLET \
+ MASK_V8 + MASK_V9 + MASK_DEPRECATED_V8_INSNS)
/* TARGET_HARD_MUL: Use hardware multiply instructions but not %y.
TARGET_HARD_MUL32: Use hardware multiply instructions with rd %y
to get high 32 bits. False in V8+ or V9 because multiply stores
/* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y. */
#define TARGET_HARD_MUL \
(TARGET_SPARCLITE || TARGET_SPARCLET \
|| TARGET_V8 || TARGET_DEPRECATED_V8_INSNS)
/* TARGET_HARD_MUL32: Use 32-bit hardware multiply instructions with %y
to get high 32 bits. False in 64-bit or V8+ because multiply stores
a 64-bit result in a register. */
#define TARGET_HARD_MUL32 \
((TARGET_V8 || TARGET_SPARCLITE \
|| TARGET_SPARCLET || TARGET_DEPRECATED_V8_INSNS) \
&& ! TARGET_V8PLUS && TARGET_ARCH32)
#define TARGET_HARD_MUL \
(TARGET_V8 || TARGET_SPARCLITE || TARGET_SPARCLET \
|| TARGET_DEPRECATED_V8_INSNS || TARGET_V8PLUS)
#define TARGET_HARD_MUL32 \
(TARGET_HARD_MUL && TARGET_ARCH32 && !TARGET_V8PLUS)
/* MASK_APP_REGS must always be the default because that's what
FIXED_REGISTERS is set to and -ffixed- is processed before