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re PR rtl-optimization/66706 (Redundant bitmask instruction on x >> (n & 32)) 

PR rtl-optimization/66706
	* gcc.target/powerpc/shift-int.c: New testcase.

From-SVN: r225382
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Segher Boessenkool 2015-07-03 16:37:26 +02:00 committed by Segher Boessenkool
parent ed3caa8c2a
commit ab1d746dce
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gcc/testsuite/ChangeLog
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2015-07-03 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/66706
* gcc.target/powerpc/shift-int.c: New testcase.
2015-07-03 H.J. Lu <hongjiu.lu@intel.com>
PR target/66746.

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gcc/testsuite/gcc.target/powerpc/shift-int.c Normal file
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/* Check that shifts do not get unnecessary extends.
See PR66706 for a case where this failed. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* Each function should compile to exactly two instructions. */
/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 16 } } */
/* { dg-final { scan-assembler-times {(?n)^\s+blr} 8 } } */
typedef unsigned u;
typedef signed s;
u rot(u x, u n) { return (x << n) | (x >> (32 - n)); }
u shl(u x, u n) { return x << n; }
u shr(u x, u n) { return x >> n; }
s asr(s x, u n) { return x >> n; }
u roti(u x) { return (x << 23) | (x >> 9); }
u shli(u x) { return x << 23; }
u shri(u x) { return x >> 23; }
s asri(s x) { return x >> 23; }