mmx.md ("sse2_umulv1siv2di3"): Rename from "sse2_umulsidi3".
* config/i386/mmx.md ("sse2_umulv1siv2di3"): Rename from "sse2_umulsidi3". Use V1DI mode for operand 0. ("mmx_psadbw"): Use V1DI mode for operand 0. * config/i386/i386-modes.def (V1SI): New vector mode. * config/i386/i386.c (struct builtin_description) [IX86_BUILTIN_PMULUDQ]: Use CODE_FOR_sse2_umulv1siv1di3. (v1di_ftype_v8qi_v8qi): Rename from di_ftype_v8qi_v8qi. (v1di_ftype_v2si_v2si): Rename from di_ftype_v2si_v2si. (ix86_init_mmx_sse_builtins) [__builtin_ia32_psadbw]: Use v1di_ftype_v8qi_v8qi type. [__builtin_ia32_pmuludq]: Use v1di_ftype_v2si_v2si type. From-SVN: r133243
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@ -1,3 +1,20 @@
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2008-03-15 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/mmx.md ("sse2_umulv1siv2di3"): Rename from
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"sse2_umulsidi3". Use V1DI mode for operand 0.
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("mmx_psadbw"): Use V1DI mode for operand 0.
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* config/i386/i386-modes.def (V1SI): New vector mode.
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* config/i386/i386.c (struct builtin_description)
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[IX86_BUILTIN_PMULUDQ]: Use CODE_FOR_sse2_umulv1siv1di3.
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(v1di_ftype_v8qi_v8qi): Rename from di_ftype_v8qi_v8qi.
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(v1di_ftype_v2si_v2si): Rename from di_ftype_v2si_v2si.
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(ix86_init_mmx_sse_builtins) [__builtin_ia32_psadbw]: Use
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v1di_ftype_v8qi_v8qi type.
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[__builtin_ia32_pmuludq]: Use v1di_ftype_v2si_v2si type.
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* doc/extend.texi (X86 Built-in Functions) [__builtin_ia32_psadbw,
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__builtin_ia32_pmuludq]: Fix the mode of return value.
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2008-03-15 Richard Guenther <rguenther@suse.de>
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PR middle-end/35595
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@ -80,6 +80,7 @@ VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
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VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
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VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */
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VECTOR_MODE (INT, DI, 1); /* V1DI */
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VECTOR_MODE (INT, SI, 1); /* V1SI */
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VECTOR_MODE (INT, QI, 2); /* V2QI */
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VECTOR_MODE (INT, DI, 4); /* V4DI */
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VECTOR_MODE (INT, SI, 8); /* V8SI */
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@ -18122,7 +18122,7 @@ static const struct builtin_description bdesc_2arg[] =
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_umulv8hi3_highpart, "__builtin_ia32_pmulhuw128", IX86_BUILTIN_PMULHUW128, UNKNOWN, 0 },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_psadbw, 0, IX86_BUILTIN_PSADBW128, UNKNOWN, 0 },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_umulsidi3, 0, IX86_BUILTIN_PMULUDQ, UNKNOWN, 0 },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_umulv1siv1di3, 0, IX86_BUILTIN_PMULUDQ, UNKNOWN, 0 },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_umulv2siv2di3, 0, IX86_BUILTIN_PMULUDQ128, UNKNOWN, 0 },
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{ OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_pmaddwd, 0, IX86_BUILTIN_PMADDWD128, UNKNOWN, 0 },
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@ -18826,11 +18826,11 @@ ix86_init_mmx_sse_builtins (void)
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tree v4si_ftype_v8hi_v8hi
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= build_function_type_list (V4SI_type_node,
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V8HI_type_node, V8HI_type_node, NULL_TREE);
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tree di_ftype_v8qi_v8qi
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= build_function_type_list (long_long_unsigned_type_node,
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tree v1di_ftype_v8qi_v8qi
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= build_function_type_list (V1DI_type_node,
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V8QI_type_node, V8QI_type_node, NULL_TREE);
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tree di_ftype_v2si_v2si
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= build_function_type_list (long_long_unsigned_type_node,
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tree v1di_ftype_v2si_v2si
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= build_function_type_list (V1DI_type_node,
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V2SI_type_node, V2SI_type_node, NULL_TREE);
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tree v2di_ftype_v16qi_v16qi
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= build_function_type_list (V2DI_type_node,
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@ -19318,7 +19318,7 @@ ix86_init_mmx_sse_builtins (void)
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def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, "__builtin_ia32_sfence", void_ftype_void, IX86_BUILTIN_SFENCE);
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def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, "__builtin_ia32_psadbw", di_ftype_v8qi_v8qi, IX86_BUILTIN_PSADBW);
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def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, "__builtin_ia32_psadbw", v1di_ftype_v8qi_v8qi, IX86_BUILTIN_PSADBW);
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def_builtin_const (OPTION_MASK_ISA_SSE, "__builtin_ia32_rcpps", v4sf_ftype_v4sf, IX86_BUILTIN_RCPPS);
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def_builtin_const (OPTION_MASK_ISA_SSE, "__builtin_ia32_rcpss", v4sf_ftype_v4sf, IX86_BUILTIN_RCPSS);
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@ -19422,7 +19422,7 @@ ix86_init_mmx_sse_builtins (void)
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def_builtin (OPTION_MASK_ISA_SSE2, "__builtin_ia32_loaddqu", v16qi_ftype_pcchar, IX86_BUILTIN_LOADDQU);
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def_builtin (OPTION_MASK_ISA_SSE2, "__builtin_ia32_storedqu", void_ftype_pchar_v16qi, IX86_BUILTIN_STOREDQU);
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def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_ia32_pmuludq", di_ftype_v2si_v2si, IX86_BUILTIN_PMULUDQ);
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def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_ia32_pmuludq", v1di_ftype_v2si_v2si, IX86_BUILTIN_PMULUDQ);
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def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_ia32_pmuludq128", v2di_ftype_v4si_v4si, IX86_BUILTIN_PMULUDQ128);
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def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_ia32_pslldqi128", v2di_ftype_v2di_int, IX86_BUILTIN_PSLLDQI128);
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@ -699,15 +699,15 @@
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[(set_attr "type" "mmxmul")
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(set_attr "mode" "DI")])
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(define_insn "sse2_umulsidi3"
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[(set (match_operand:DI 0 "register_operand" "=y")
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(mult:DI
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(zero_extend:DI
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(vec_select:SI
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(define_insn "sse2_umulv1siv1di3"
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[(set (match_operand:V1DI 0 "register_operand" "=y")
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(mult:V1DI
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(zero_extend:V1DI
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(vec_select:V1SI
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(match_operand:V2SI 1 "nonimmediate_operand" "%0")
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(parallel [(const_int 0)])))
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(zero_extend:DI
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(vec_select:SI
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(zero_extend:V1DI
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(vec_select:V1SI
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(match_operand:V2SI 2 "nonimmediate_operand" "ym")
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(parallel [(const_int 0)])))))]
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"TARGET_SSE2 && ix86_binary_operator_ok (MULT, V2SImode, operands)"
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@ -1293,10 +1293,10 @@
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(set_attr "mode" "DI")])
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(define_insn "mmx_psadbw"
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[(set (match_operand:DI 0 "register_operand" "=y")
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(unspec:DI [(match_operand:V8QI 1 "register_operand" "0")
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(match_operand:V8QI 2 "nonimmediate_operand" "ym")]
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UNSPEC_PSADBW))]
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[(set (match_operand:V1DI 0 "register_operand" "=y")
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(unspec:V1DI [(match_operand:V8QI 1 "register_operand" "0")
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(match_operand:V8QI 2 "nonimmediate_operand" "ym")]
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UNSPEC_PSADBW))]
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"TARGET_SSE || TARGET_3DNOW_A"
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"psadbw\t{%2, %0|%0, %2}"
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[(set_attr "type" "mmxshft")
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@ -7505,7 +7505,7 @@ instruction that is part of the name.
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v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
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v8qi __builtin_ia32_pavgb (v8qi, v8qi)
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v4hi __builtin_ia32_pavgw (v4hi, v4hi)
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v4hi __builtin_ia32_psadbw (v8qi, v8qi)
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v1di __builtin_ia32_psadbw (v8qi, v8qi)
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v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
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v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
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v8qi __builtin_ia32_pminub (v8qi, v8qi)
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@ -7753,7 +7753,7 @@ void __builtin_ia32_lfence (void)
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void __builtin_ia32_mfence (void)
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v16qi __builtin_ia32_loaddqu (const char *)
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void __builtin_ia32_storedqu (char *, v16qi)
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unsigned long long __builtin_ia32_pmuludq (v2si, v2si)
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v1di __builtin_ia32_pmuludq (v2si, v2si)
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v2di __builtin_ia32_pmuludq128 (v4si, v4si)
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v8hi __builtin_ia32_psllw128 (v8hi, v8hi)
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v4si __builtin_ia32_pslld128 (v4si, v4si)
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