re PR target/81151 (-Wmaybe-uninitialized in insn-emit.c)
PR target/81151 * config/i386/sse.md (round<mode>2): Renumber match_dup and operands indexes to avoid gap between operands and match_dups. From-SVN: r249469
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@ -1,3 +1,9 @@
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2017-06-21 Jakub Jelinek <jakub@redhat.com>
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PR target/81151
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* config/i386/sse.md (round<mode>2): Renumber match_dup and
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operands indexes to avoid gap between operands and match_dups.
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2017-06-21 Andrew Pinski <apinski@cavium.com>
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2017-06-21 Andrew Pinski <apinski@cavium.com>
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* config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs):
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* config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs):
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@ -15638,13 +15638,13 @@
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(set_attr "mode" "<MODE>")])
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(set_attr "mode" "<MODE>")])
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(define_expand "round<mode>2"
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(define_expand "round<mode>2"
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[(set (match_dup 4)
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[(set (match_dup 3)
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(plus:VF
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(plus:VF
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(match_operand:VF 1 "register_operand")
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(match_operand:VF 1 "register_operand")
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(match_dup 3)))
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(match_dup 2)))
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(set (match_operand:VF 0 "register_operand")
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(set (match_operand:VF 0 "register_operand")
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(unspec:VF
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(unspec:VF
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[(match_dup 4) (match_dup 5)]
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[(match_dup 3) (match_dup 4)]
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UNSPEC_ROUND))]
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UNSPEC_ROUND))]
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"TARGET_ROUND && !flag_trapping_math"
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"TARGET_ROUND && !flag_trapping_math"
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{
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{
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@ -15664,11 +15664,11 @@
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vec_half = ix86_build_const_vector (<MODE>mode, true, half);
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vec_half = ix86_build_const_vector (<MODE>mode, true, half);
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vec_half = force_reg (<MODE>mode, vec_half);
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vec_half = force_reg (<MODE>mode, vec_half);
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operands[3] = gen_reg_rtx (<MODE>mode);
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operands[2] = gen_reg_rtx (<MODE>mode);
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emit_insn (gen_copysign<mode>3 (operands[3], vec_half, operands[1]));
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emit_insn (gen_copysign<mode>3 (operands[2], vec_half, operands[1]));
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operands[4] = gen_reg_rtx (<MODE>mode);
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operands[3] = gen_reg_rtx (<MODE>mode);
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operands[5] = GEN_INT (ROUND_TRUNC);
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operands[4] = GEN_INT (ROUND_TRUNC);
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})
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})
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(define_expand "round<mode>2_sfix"
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(define_expand "round<mode>2_sfix"
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