invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.
* doc/invoke.texi: Document new MIPS -msym32 and -mno-sym32 options. * config/mips/mips.h (MASK_SYM32, TARGET_SYM32): New macros. (TARGET_SWITCHES): Add -msym32 and -mno-sym32. (ABI_HAS_64BIT_SYMBOLS): Set to false if TARGET_SYM32. (ASM_SPEC): Pass down -msym32 and -mno-sym32. From-SVN: r95926
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@ -1,3 +1,11 @@
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2005-03-05 Richard Sandiford <rsandifo@redhat.com>
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* doc/invoke.texi: Document new MIPS -msym32 and -mno-sym32 options.
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* config/mips/mips.h (MASK_SYM32, TARGET_SYM32): New macros.
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(TARGET_SWITCHES): Add -msym32 and -mno-sym32.
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(ABI_HAS_64BIT_SYMBOLS): Set to false if TARGET_SYM32.
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(ASM_SPEC): Pass down -msym32 and -mno-sym32.
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2005-03-04 Devang Patel <dpatel@apple.com>
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PR tree-optimization/18815
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@ -164,6 +164,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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break instead of trap. */
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#define MASK_PAIRED_SINGLE 0x10000000 /* Support paired-single FPU. */
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#define MASK_MIPS3D 0x20000000 /* Support MIPS-3D instructions. */
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#define MASK_SYM32 0x40000000 /* Assume 32-bit symbol values. */
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/* Debug switches, not documented */
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#define MASK_DEBUG 0 /* unused */
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@ -242,6 +243,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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#define TARGET_PAIRED_SINGLE_FLOAT \
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((target_flags & MASK_PAIRED_SINGLE) != 0)
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#define TARGET_MIPS3D ((target_flags & MASK_MIPS3D) != 0)
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#define TARGET_SYM32 ((target_flags & MASK_SYM32) != 0)
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/* True if we should use NewABI-style relocation operators for
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symbolic addresses. This is never true for mips16 code,
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@ -669,6 +671,10 @@ extern const struct mips_cpu_info *mips_tune_info;
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N_("FP exceptions are enabled") }, \
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{"no-fp-exceptions", -MASK_FP_EXCEPTIONS, \
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N_("FP exceptions are not enabled") }, \
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{"sym32", MASK_SYM32, \
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N_("Assume all symbols have 32-bit values") }, \
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{"no-sym32", -MASK_SYM32, \
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N_("Don't assume all symbols have 32-bit values") }, \
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{"debug", MASK_DEBUG, \
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NULL}, \
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{"debugd", MASK_DEBUG_D, \
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@ -843,7 +849,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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/* True if symbols are 64 bits wide. At present, n64 is the only
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ABI for which this is true. */
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#define ABI_HAS_64BIT_SYMBOLS (mips_abi == ABI_64)
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#define ABI_HAS_64BIT_SYMBOLS (mips_abi == ABI_64 && !TARGET_SYM32)
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/* ISA has instructions for managing 64 bit fp and gp regs (e.g. mips3). */
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#define ISA_HAS_64BIT_REGS (ISA_MIPS3 \
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@ -1093,6 +1099,7 @@ extern const struct mips_cpu_info *mips_tune_info;
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%(subtarget_asm_debugging_spec) \
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%{mabi=*} %{!mabi*: %(asm_abi_default_spec)} \
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%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
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%{msym32} %{mno-sym32} \
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%{mtune=*} %{v} \
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%(subtarget_asm_spec)"
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@ -548,7 +548,7 @@ Objective-C and Objective-C++ Dialects}.
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-mxgot -mno-xgot -mgp32 -mgp64 -mfp32 -mfp64 @gol
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-mhard-float -msoft-float -msingle-float -mdouble-float @gol
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-mpaired-single -mips3d @gol
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-mint64 -mlong64 -mlong32 @gol
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-mint64 -mlong64 -mlong32 -msym32 -mno-sym32 @gol
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-G@var{num} -membedded-data -mno-embedded-data @gol
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-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
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-msplit-addresses -mno-split-addresses @gol
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@ -9679,6 +9679,15 @@ uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
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32-bit @code{long}s. Pointers are the same size as @code{long}s,
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or the same size as integer registers, whichever is smaller.
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@item -msym32
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@itemx -mno-sym32
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@opindex msym32
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@opindex mno-sym32
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Assume (do not assume) that all symbols have 32-bit values, regardless
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of the selected ABI@. This option is useful in combination with
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@option{-mabi=64} and @option{-mno-abicalls} because it allows GCC
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to generate shorter and faster references to symbolic addresses.
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@item -G @var{num}
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@opindex G
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@cindex smaller data references (MIPS)
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