re PR target/80970 (internal compiler error in find_reloads, at reload.c:4077)

PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".

From-SVN: r249401
This commit is contained in:
Andreas Schwab 2017-06-20 10:15:47 +00:00 committed by Andreas Schwab
parent d47d743898
commit ad2f2a35d3
3 changed files with 22 additions and 3 deletions

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@ -1,3 +1,9 @@
2017-06-20 Andreas Schwab <schwab@suse.de>
PR target/80970
* config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d"
instead of "+d".
2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): New block to define

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@ -5337,7 +5337,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bsetdreg"
[(set (match_operand:SI 0 "register_operand" "+d")
[(set (match_operand:SI 0 "register_operand" "=d")
(ior:SI (ashift:SI (const_int 1)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))
@ -5350,7 +5350,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bchgdreg"
[(set (match_operand:SI 0 "register_operand" "+d")
[(set (match_operand:SI 0 "register_operand" "=d")
(xor:SI (ashift:SI (const_int 1)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))
@ -5363,7 +5363,7 @@
[(set_attr "type" "bitrw")])
(define_insn "*bclrdreg"
[(set (match_operand:SI 0 "register_operand" "+d")
[(set (match_operand:SI 0 "register_operand" "=d")
(and:SI (rotate:SI (const_int -2)
(and:SI (match_operand:SI 1 "register_operand" "d")
(const_int 31)))

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@ -0,0 +1,13 @@
/* { dg-do compile } */
int a, b, c, d, e;
void f ()
{
long g, h;
if (c)
e = d;
g = d & 31;
h = 1 << g;
a = e | h;
b = a;
}