real.h (struct real_value): Add signalling.
* real.h (struct real_value): Add signalling.
(EXP_BITS): Decrement.
* real.c (get_canonical_qnan): Don't set MSB-1.
(get_canonical_snan): Likewise. Set signalling.
(real_identical): Compare signalling.
(round_for_format): Remove force-one-bit on code.
(real_nan): Likewise. Set signalling.
(encode_ieee_single): Add force-one-bit code; honor signalling.
(encode_ieee_double, encode_ieee_extended, encode_ieee_quad): Likewise.
(decode_ieee_single): Set signalling.
(decode_ieee_double, decode_ieee_extended, decode_ieee_quad): Likewise.
From-SVN: r64935
This commit is contained in:
Richard Henderson
Richard Henderson
parent
940bbb7441
commit
ad59ba209d
@ -1,3 +1,17 @@
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2003-03-27 Richard Henderson <rth@redhat.com>
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* real.h (struct real_value): Add signalling.
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(EXP_BITS): Decrement.
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* real.c (get_canonical_qnan): Don't set MSB-1.
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(get_canonical_snan): Likewise. Set signalling.
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(real_identical): Compare signalling.
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(round_for_format): Remove force-one-bit on code.
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(real_nan): Likewise. Set signalling.
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(encode_ieee_single): Add force-one-bit code; honor signalling.
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(encode_ieee_double, encode_ieee_extended, encode_ieee_quad): Likewise.
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(decode_ieee_single): Set signalling.
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(decode_ieee_double, decode_ieee_extended, decode_ieee_quad): Likewise.
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2003-03-27 Olivier Hainque <hainque@act-europe.fr>
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PR ada/9953
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81
gcc/real.c
81
gcc/real.c
@ -158,7 +158,6 @@ get_canonical_qnan (r, sign)
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memset (r, 0, sizeof (*r));
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r->class = rvc_nan;
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r->sign = sign;
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r->sig[SIGSZ-1] = SIG_MSB >> 1;
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}
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static inline void
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@ -169,7 +168,7 @@ get_canonical_snan (r, sign)
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memset (r, 0, sizeof (*r));
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r->class = rvc_nan;
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r->sign = sign;
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r->sig[SIGSZ-1] = SIG_MSB >> 2;
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r->signalling = 1;
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}
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static inline void
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@ -1235,6 +1234,8 @@ real_identical (a, b)
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return false;
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/* FALLTHRU */
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case rvc_nan:
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if (a->signalling != b->signalling)
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return false;
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for (i = 0; i < SIGSZ; ++i)
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if (a->sig[i] != b->sig[i])
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return false;
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@ -2249,23 +2250,7 @@ real_nan (r, str, quiet, mode)
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r->sig[SIGSZ-1] &= ~SIG_MSB;
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/* Force quiet or signalling NaN. */
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if (quiet)
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r->sig[SIGSZ-1] |= SIG_MSB >> 1;
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else
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r->sig[SIGSZ-1] &= ~(SIG_MSB >> 1);
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/* Force at least one bit of the significand set. */
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for (d = 0; d < SIGSZ; ++d)
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if (r->sig[d])
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break;
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if (d == SIGSZ)
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r->sig[SIGSZ-1] |= SIG_MSB >> 2;
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/* Our intermediate format forces QNaNs to have MSB-1 set.
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If the target format has QNaNs with the top bit unset,
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mirror the output routines and invert the top two bits. */
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if (!fmt->qnan_msb_set)
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r->sig[SIGSZ-1] ^= (SIG_MSB >> 1) | (SIG_MSB >> 2);
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r->signalling = !quiet;
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}
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return true;
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@ -2325,14 +2310,6 @@ round_for_format (fmt, r)
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case rvc_nan:
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clear_significand_below (r, np2);
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/* If we've cleared the entire significand, we need one bit
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set for this to continue to be a NaN. */
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for (i = 0; i < SIGSZ; ++i)
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if (r->sig[i])
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break;
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if (i == SIGSZ)
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r->sig[SIGSZ-1] = SIG_MSB >> 2;
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return;
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case rvc_normal:
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@ -2642,10 +2619,15 @@ encode_ieee_single (fmt, buf, r)
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case rvc_nan:
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if (fmt->has_nans)
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{
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if (r->signalling == fmt->qnan_msb_set)
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sig &= ~(1 << 22);
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else
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sig |= 1 << 22;
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if (sig == 0)
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sig = 1 << 21;
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image |= 255 << 23;
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image |= sig;
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if (!fmt->qnan_msb_set)
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image ^= 1 << 23 | 1 << 22;
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}
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else
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image |= 0x7fffffff;
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@ -2703,8 +2685,7 @@ decode_ieee_single (fmt, r, buf)
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{
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r->class = rvc_nan;
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r->sign = sign;
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if (!fmt->qnan_msb_set)
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image ^= (SIG_MSB >> 1 | SIG_MSB >> 2);
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r->signalling = ((image >> 22) & 1) ^ fmt->qnan_msb_set;
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r->sig[SIGSZ-1] = image;
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}
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else
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@ -2791,10 +2772,15 @@ encode_ieee_double (fmt, buf, r)
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case rvc_nan:
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if (fmt->has_nans)
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{
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if (r->signalling == fmt->qnan_msb_set)
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sig_hi &= ~(1 << 19);
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else
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sig_hi |= 1 << 19;
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if (sig_hi == 0 && sig_lo == 0)
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sig_hi = 1 << 18;
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image_hi |= 2047 << 20;
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image_hi |= sig_hi;
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if (!fmt->qnan_msb_set)
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image_hi ^= 1 << 19 | 1 << 18;
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image_lo = sig_lo;
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}
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else
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@ -2884,6 +2870,7 @@ decode_ieee_double (fmt, r, buf)
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{
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r->class = rvc_nan;
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r->sign = sign;
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r->signalling = ((image_hi >> 30) & 1) ^ fmt->qnan_msb_set;
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if (HOST_BITS_PER_LONG == 32)
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{
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r->sig[SIGSZ-1] = image_hi;
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@ -2891,9 +2878,6 @@ decode_ieee_double (fmt, r, buf)
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}
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else
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r->sig[SIGSZ-1] = (image_hi << 31 << 1) | image_lo;
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if (!fmt->qnan_msb_set)
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r->sig[SIGSZ-1] ^= (SIG_MSB >> 1 | SIG_MSB >> 2);
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}
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else
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{
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@ -2999,8 +2983,12 @@ encode_ieee_extended (fmt, buf, r)
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sig_hi = sig_lo >> 31 >> 1;
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sig_lo &= 0xffffffff;
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}
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if (!fmt->qnan_msb_set)
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sig_hi ^= 1 << 30 | 1 << 29;
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if (r->signalling == fmt->qnan_msb_set)
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sig_hi &= ~(1 << 30);
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else
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sig_hi |= 1 << 30;
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if ((sig_hi & 0x7fffffff) == 0 && sig_lo == 0)
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sig_hi = 1 << 29;
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/* Intel requires the explicit integer bit to be set, otherwise
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it considers the value a "pseudo-nan". Motorola docs say it
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@ -3131,6 +3119,7 @@ decode_ieee_extended (fmt, r, buf)
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{
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r->class = rvc_nan;
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r->sign = sign;
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r->signalling = ((sig_hi >> 30) & 1) ^ fmt->qnan_msb_set;
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if (HOST_BITS_PER_LONG == 32)
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{
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r->sig[SIGSZ-1] = sig_hi;
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@ -3138,9 +3127,6 @@ decode_ieee_extended (fmt, r, buf)
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}
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else
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r->sig[SIGSZ-1] = (sig_hi << 31 << 1) | sig_lo;
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if (!fmt->qnan_msb_set)
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r->sig[SIGSZ-1] ^= (SIG_MSB >> 1 | SIG_MSB >> 2);
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}
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else
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{
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@ -3395,9 +3381,12 @@ encode_ieee_quad (fmt, buf, r)
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image0 &= 0xffffffff;
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image2 &= 0xffffffff;
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}
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if (!fmt->qnan_msb_set)
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image3 ^= 1 << 15 | 1 << 14;
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if (r->signalling == fmt->qnan_msb_set)
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image3 &= ~0x8000;
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else
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image3 |= 0x8000;
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if (((image3 & 0xffff) | image2 | image1 | image0) == 0)
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image3 |= 0x4000;
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}
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else
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{
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@ -3522,6 +3511,7 @@ decode_ieee_quad (fmt, r, buf)
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{
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r->class = rvc_nan;
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r->sign = sign;
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r->signalling = ((image3 >> 15) & 1) ^ fmt->qnan_msb_set;
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if (HOST_BITS_PER_LONG == 32)
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{
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@ -3536,9 +3526,6 @@ decode_ieee_quad (fmt, r, buf)
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r->sig[1] = (image3 << 31 << 1) | image2;
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}
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lshift_significand (r, r, SIGNIFICAND_BITS - 113);
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if (!fmt->qnan_msb_set)
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r->sig[SIGSZ-1] ^= (SIG_MSB >> 1 | SIG_MSB >> 2);
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}
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else
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{
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@ -35,7 +35,7 @@ enum real_value_class {
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};
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#define SIGNIFICAND_BITS (128 + HOST_BITS_PER_LONG)
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#define EXP_BITS (32 - 3)
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#define EXP_BITS (32 - 4)
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#define MAX_EXP ((1 << (EXP_BITS - 1)) - 1)
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#define SIGSZ (SIGNIFICAND_BITS / HOST_BITS_PER_LONG)
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#define SIG_MSB ((unsigned long)1 << (HOST_BITS_PER_LONG - 1))
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@ -44,6 +44,7 @@ struct real_value GTY(())
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{
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ENUM_BITFIELD (real_value_class) class : 2;
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unsigned int sign : 1;
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unsigned int signalling : 1;
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signed int exp : EXP_BITS;
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unsigned long sig[SIGSZ];
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};
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