re PR middle-end/25586 (FAIL: gfortran.dg/cray_pointers_2.f90 at -O2 and above)
PR fortran/25586 * pa.md: Remove REG_POINTER check from REG+REG peephole2 floating-point store patterns. From-SVN: r109166
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3bc77af76f
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ae21215e5c
@ -1,3 +1,9 @@
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2005-12-30 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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PR fortran/25586
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* pa.md: Remove REG_POINTER check from REG+REG peephole2 floating-point
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store patterns.
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2005-12-29 Mike Stump <mrs@apple.com>
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* doc/invoke.texi (Objective-C and Objective-C++ Dialect Options
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@ -2421,9 +2421,9 @@
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(match_operand:SI 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SI (plus:SI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -2438,9 +2438,9 @@
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(match_operand:SI 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SI (plus:SI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -2456,9 +2456,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SI (plus:DI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -2474,9 +2474,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SI (plus:DI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -3948,9 +3948,9 @@
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(match_operand:DF 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DF (plus:SI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -3965,9 +3965,9 @@
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(match_operand:DF 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DF (plus:SI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -3983,9 +3983,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DF (plus:DI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -4001,9 +4001,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DF (plus:DI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -4253,9 +4253,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DI (plus:DI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -4271,9 +4271,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:DI (plus:DI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -4486,9 +4486,9 @@
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(match_operand:SF 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SF (plus:SI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -4503,9 +4503,9 @@
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(match_operand:SF 3 "register_operand" ""))]
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SF (plus:SI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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@ -4521,9 +4521,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[1])
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&& (TARGET_NO_SPACE_REGS
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|| (!REG_POINTER (operands[1]) && REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_INDEX_P (operands[1])
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&& REG_OK_FOR_BASE_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SF (plus:DI (match_dup 1) (match_dup 2)))
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(match_dup 3))
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@ -4539,9 +4539,9 @@
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"!TARGET_SOFT_FLOAT
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&& !TARGET_DISABLE_INDEXING
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&& TARGET_64BIT
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&& REG_OK_FOR_BASE_P (operands[2])
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&& (TARGET_NO_SPACE_REGS
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|| (REG_POINTER (operands[1]) && !REG_POINTER (operands[2])))
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&& TARGET_NO_SPACE_REGS
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&& REG_OK_FOR_BASE_P (operands[1])
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&& REG_OK_FOR_INDEX_P (operands[2])
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&& FP_REGNO_P (REGNO (operands[3]))"
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[(set (mem:SF (plus:DI (match_dup 2) (match_dup 1)))
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(match_dup 3))
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