re PR middle-end/16815 (MIPS n32/n64 inefficient code for float arguments)
PR target/16815 * function.c (assign_parm_setup_block_p): Tighten BLOCK_REG_PADDING check. * config/pa/pa.h (BLOCK_REG_PADDING): Define in terms of function_arg_padding. From-SVN: r88660
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@ -1,3 +1,11 @@
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2004-10-07 Richard Sandiford <rsandifo@redhat.com>
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PR target/16815
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* function.c (assign_parm_setup_block_p): Tighten BLOCK_REG_PADDING
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check.
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* config/pa/pa.h (BLOCK_REG_PADDING): Define in terms of
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function_arg_padding.
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2004-10-07 Richard Sandiford <rsandifo@redhat.com>
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PR bootstrap/17857
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@ -918,7 +918,8 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; };
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We use a DImode register in the parallel for 5 to 7 byte structures
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so that there is only one element. This allows the object to be
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correctly padded. */
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#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) (TARGET_64BIT ? upward : downward)
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#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
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function_arg_padding ((MODE), (TYPE))
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/* Do not expect to understand this without reading it several times. I'm
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tempted to try and simply it, but I worry about breaking something. */
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@ -2513,8 +2513,12 @@ assign_parm_setup_block_p (struct assign_parm_data_one *data)
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return true;
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#ifdef BLOCK_REG_PADDING
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if (data->locate.where_pad == (BYTES_BIG_ENDIAN ? upward : downward)
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&& GET_MODE_SIZE (data->promoted_mode) < UNITS_PER_WORD)
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/* Only assign_parm_setup_block knows how to deal with register arguments
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that are padded at the least significant end. */
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if (REG_P (data->entry_parm)
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&& GET_MODE_SIZE (data->promoted_mode) < UNITS_PER_WORD
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&& (BLOCK_REG_PADDING (data->passed_mode, data->passed_type, 1)
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== (BYTES_BIG_ENDIAN ? upward : downward)))
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return true;
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#endif
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