Add movdi pattern to FR30 port.
From-SVN: r33885
This commit is contained in:
Nick Clifton
Nick Clifton
parent
1d11bf189e
commit
aeb4f5ef5d
@ -1,3 +1,22 @@
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2000-05-12 Nick Clifton <nickc@cygnus.com>
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* config/fr30/fr30.c (fr30_move_double): New function: Emit code
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to move a double word value.
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(di_operand): New function: Return true if the operand is suitbale
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for a double word move operation.
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(nonimmediate_di_operand): New function: Return true if the
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operand is a DImode register or MEM.
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* config/fr30/fr30.h (PREDICATE_CODES): Add di_operand and
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nonimmediate_di_operand.
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* config/fr30/fr30-protos.h Add fr30_move_double, di_operand, and
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nonimmediate_di_operand.
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* config/fr30/fr30.md (movdi): New pattern. Required because
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other patterns generate DImode results.
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(movdi_insn): New pattern.
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2000-05-12 Richard Henderson <rth@cygnus.com>
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* config/alpha/alpha.c (struct shadow_summary): Define
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@ -26,6 +26,7 @@ extern unsigned int fr30_compute_frame_size PARAMS ((int, int));
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extern int fr30_check_multiple_regs PARAMS ((rtx *, int, int));
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extern void fr30_print_operand PARAMS ((FILE *, rtx, int));
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extern void fr30_print_operand_address PARAMS ((FILE *, rtx));
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extern rtx fr30_move_double PARAMS ((rtx *));
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#ifdef TREE_CODE
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extern rtx fr30_va_arg PARAMS ((tree, tree));
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#endif /* TREE_CODE */
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@ -36,6 +37,8 @@ extern int add_immediate_operand PARAMS ((rtx, Mmode));
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extern int high_register_operand PARAMS ((rtx, Mmode));
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extern int low_register_operand PARAMS ((rtx, Mmode));
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extern int call_operand PARAMS ((rtx, Mmode));
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extern int di_operand PARAMS ((rtx, Mmode));
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extern int nonimmediate_di_operand PARAMS ((rtx, Mmode));
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#undef Mmode
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#endif /* HAVE_MACHINE_MODES */
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#endif /* RTX_CODE */
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@ -24,10 +24,8 @@ Boston, MA 02111-1307, USA. */
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/*}}}*/
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/*{{{ Includes */
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#include <stdio.h>
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#include <ctype.h>
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#include <sys/param.h> /* so that MIn and MAX are defined before machmode.h */
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#include "config.h"
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#include "system.h"
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#include "rtl.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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@ -44,7 +42,7 @@ Boston, MA 02111-1307, USA. */
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#include "obstack.h"
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#include "except.h"
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#include "function.h"
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#include "fr30-protos.h"
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#include "tm_p.h"
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/*}}}*/
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/*{{{ Function Prologues & Epilogues */
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@ -839,8 +837,7 @@ low_register_operand (operand, mode)
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{
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return
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(GET_CODE (operand) == REG
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&& REGNO (operand) <= 7
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&& REGNO (operand) >= 0);
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&& REGNO (operand) <= 7);
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}
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/* Returns true if OPERAND is suitable for use in a CALL insn. */
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@ -854,6 +851,56 @@ call_operand (operand, mode)
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|| GET_CODE (XEXP (operand, 0)) == REG));
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}
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/* Returns TRUE if OP is a valid operand of a DImode operation. */
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int
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di_operand (op, mode)
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rtx op;
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Mmode mode;
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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switch (GET_CODE (op))
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{
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case CONST_DOUBLE:
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case CONST_INT:
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return TRUE;
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case MEM:
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return memory_address_p (DImode, XEXP (op, 0));
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default:
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return FALSE;
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}
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}
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/* Returns TRUE if OP is a DImode register or MEM. */
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int
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nonimmediate_di_operand (op, mode)
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rtx op;
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Mmode mode;
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{
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if (register_operand (op, mode))
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return TRUE;
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if (mode != VOIDmode && GET_MODE (op) != VOIDmode && GET_MODE (op) != DImode)
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return FALSE;
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if (GET_CODE (op) == SUBREG)
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op = SUBREG_REG (op);
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if (GET_CODE (op) == MEM)
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return memory_address_p (DImode, XEXP (op, 0));
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return FALSE;
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}
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/* Returns true iff all the registers in the operands array
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are in descending or ascending order. */
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int
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@ -864,9 +911,9 @@ fr30_check_multiple_regs (operands, num_operands, descending)
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{
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if (descending)
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{
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int prev_regno = -1;
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unsigned int prev_regno = 0;
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while (num_operands--)
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while (num_operands --)
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{
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if (GET_CODE (operands [num_operands]) != REG)
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return 0;
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@ -879,9 +926,9 @@ fr30_check_multiple_regs (operands, num_operands, descending)
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}
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else
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{
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int prev_regno = CONDITION_CODE_REGNUM;
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unsigned int prev_regno = CONDITION_CODE_REGNUM;
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while (num_operands--)
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while (num_operands --)
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{
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if (GET_CODE (operands [num_operands]) != REG)
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return 0;
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@ -896,6 +943,146 @@ fr30_check_multiple_regs (operands, num_operands, descending)
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return 1;
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}
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/*}}}*/
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/*{{{ Instruction Output Routines */
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/* Output a double word move.
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It must be REG<-REG, REG<-MEM, MEM<-REG or REG<-CONST.
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On the FR30 we are contrained by the fact that it does not
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support offsetable addresses, and so we have to load the
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address of the secnd word into the second destination register
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before we can use it. */
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rtx
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fr30_move_double (operands)
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rtx * operands;
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{
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rtx src = operands[1];
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rtx dest = operands[0];
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enum rtx_code src_code = GET_CODE (src);
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enum rtx_code dest_code = GET_CODE (dest);
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enum machine_mode mode = GET_MODE (dest);
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rtx val;
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start_sequence ();
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if (dest_code == REG)
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{
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if (src_code == REG)
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{
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int reverse = (REGNO (dest) == REGNO (src) + 1);
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/* We normally copy the low-numbered register first. However, if
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the first register of operand 0 is the same as the second register
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of operand 1, we must copy in the opposite order. */
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emit_insn (gen_rtx_SET (VOIDmode,
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operand_subword (dest, reverse, TRUE, mode),
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operand_subword (src, reverse, TRUE, mode)));
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emit_insn (gen_rtx_SET (VOIDmode,
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operand_subword (dest, !reverse, TRUE, mode),
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operand_subword (src, !reverse, TRUE, mode)));
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}
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else if (src_code == MEM)
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{
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rtx addr = XEXP (src, 0);
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int dregno = REGNO (dest);
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rtx dest0;
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rtx dest1;
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rtx new_mem;
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/* If the high-address word is used in the address, we
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must load it last. Otherwise, load it first. */
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int reverse = (refers_to_regno_p (dregno, dregno + 1, addr, 0) != 0);
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if (GET_CODE (addr) != REG)
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abort ();
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dest0 = operand_subword (dest, reverse, TRUE, mode);
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dest1 = operand_subword (dest, !reverse, TRUE, mode);
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if (reverse)
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{
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emit_insn (gen_rtx_SET (VOIDmode, dest1, change_address (src, SImode, addr)));
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emit_insn (gen_rtx_SET (SImode, dest0, gen_rtx_REG (SImode, REGNO (addr))));
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emit_insn (gen_rtx_SET (SImode, dest0, plus_constant (dest0, UNITS_PER_WORD)));
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new_mem = gen_rtx_MEM (SImode, dest0);
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MEM_COPY_ATTRIBUTES (new_mem, src);
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emit_insn (gen_rtx_SET (VOIDmode, dest0, new_mem));
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}
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else
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{
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emit_insn (gen_rtx_SET (VOIDmode, dest0, change_address (src, SImode, addr)));
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emit_insn (gen_rtx_SET (SImode, dest1, gen_rtx_REG (SImode, REGNO (addr))));
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emit_insn (gen_rtx_SET (SImode, dest1, plus_constant (dest1, UNITS_PER_WORD)));
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new_mem = gen_rtx_MEM (SImode, dest1);
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MEM_COPY_ATTRIBUTES (new_mem, src);
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emit_insn (gen_rtx_SET (VOIDmode, dest1, new_mem));
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}
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}
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else if (src_code == CONST_INT || src_code == CONST_DOUBLE)
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{
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rtx words[2];
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split_double (src, &words[0], &words[1]);
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emit_insn (gen_rtx_SET (VOIDmode,
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operand_subword (dest, 0, TRUE, mode),
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words[0]));
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emit_insn (gen_rtx_SET (VOIDmode,
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operand_subword (dest, 1, TRUE, mode),
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words[1]));
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}
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}
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else if (src_code == REG && dest_code == MEM)
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{
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rtx addr = XEXP (dest, 0);
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rtx src0;
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rtx src1;
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if (GET_CODE (addr) != REG)
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abort ();
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src0 = operand_subword (src, 0, TRUE, mode);
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src1 = operand_subword (src, 1, TRUE, mode);
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emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, addr), src0));
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if (REGNO (addr) == STACK_POINTER_REGNUM)
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emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (stack_pointer_rtx, UNITS_PER_WORD)), src1));
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else if (REGNO (addr) == FRAME_POINTER_REGNUM)
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emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD)), src1));
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else
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{
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rtx new_mem;
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/* We need a scratch register to hold the value of 'address + 4'.
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We ought to allow gcc to find one for us, but for now, just
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push one of the source registers. */
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emit_insn (gen_movsi_push (src0));
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emit_insn (gen_movsi_internal (src0, addr));
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emit_insn (gen_addsi_small_int (src0, src0, GEN_INT (UNITS_PER_WORD)));
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new_mem = gen_rtx_MEM (SImode, src0);
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MEM_COPY_ATTRIBUTES (new_mem, dest);
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emit_insn (gen_rtx_SET (VOIDmode, new_mem, src1));
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emit_insn (gen_movsi_pop (src0));
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}
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}
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else
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/* This should have been prevented by the contraints on movdi_insn. */
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abort ();
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val = gen_sequence ();
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end_sequence ();
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return val;
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}
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/*}}}*/
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/* Local Variables: */
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@ -84,7 +84,7 @@ extern int target_flags;
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{ "small-model", TARGET_SMALL_MODEL_MASK, "Assume small address space" }, \
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{ "no-small-model", - TARGET_SMALL_MODEL_MASK, "" }, \
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{ "no-lsim", 0, "" }, \
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{ "", TARGET_DEFAULT } \
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{ "", TARGET_DEFAULT, "" } \
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}
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#define TARGET_VERSION fprintf (stderr, " (fr30)");
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@ -889,9 +889,10 @@ enum reg_class
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into the stack)
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- if the type is a structure or union. */
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#define MUST_PASS_IN_STACK(MODE,TYPE) \
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#define MUST_PASS_IN_STACK(MODE, TYPE) \
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(((MODE) == BLKmode) \
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|| ((TYPE) != 0 \
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|| ((TYPE) != NULL \
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&& TYPE_SIZE (TYPE) != NULL \
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&& (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
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|| TREE_CODE (TYPE) == RECORD_TYPE \
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|| TREE_CODE (TYPE) == UNION_TYPE \
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@ -1763,6 +1764,8 @@ extern struct rtx_def * fr30_compare_op1;
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{ "call_operand", { MEM }}, \
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{ "fp_displacement_operand", { CONST_INT }}, \
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{ "sp_displacement_operand", { CONST_INT }}, \
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{ "di_operand", { CONST_INT, CONST_DOUBLE, REG, MEM }}, \
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{ "nonimmediate_di_operand", { REG, MEM }}, \
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{ "add_immediate_operand", { REG, CONST_INT }},
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/*}}}*/
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@ -367,6 +367,43 @@
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(const_int 2)))]
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)
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;;}}}
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;;{{{ 8 Byte Moves
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;; Note - the FR30 does not have an 8 byte load/store instruction
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;; but we have to support this pattern because some other patterns
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;; (eg muldisi2) can produce a DImode result.
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;; (This code is stolen from the M32R port.)
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(define_expand "movdi"
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[(set (match_operand:DI 0 "general_operand" "")
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(match_operand:DI 1 "general_operand" ""))]
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""
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"
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/* Everything except mem = const or mem = mem can be done easily. */
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if (GET_CODE (operands[0]) == MEM)
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operands[1] = force_reg (DImode, operands[1]);
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")
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;; We use an insn and a split so that we can generate
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;; RTL rather than text from fr30_move_double().
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(define_insn "*movdi_insn"
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,m,r")
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(match_operand:DI 1 "di_operand" "r,m,r,nF"))]
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"register_operand (operands[0], DImode) || register_operand (operands[1], DImode)"
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"#"
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[(set_attr "length" "4,8,12,12")]
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)
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(define_split
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[(set (match_operand:DI 0 "nonimmediate_di_operand" "")
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(match_operand:DI 1 "di_operand" ""))]
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"reload_completed"
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[(match_dup 2)]
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"operands[2] = fr30_move_double (operands);")
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;;}}}
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;;{{{ Load & Store Multiple Registers
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