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re PR target/69459 (wrong code with -O2 and vector arithmetics @ x86_64) 

PR target/69459
	* config/i386/constraints.md (C): Only accept constant zero operand.
	(BC): New constraint.
	* config/i386/sse.md (*mov<mode>_internal): Use BC constraint
	instead of C constraint.
	* doc/md.texi (Machine Constraints): Update description
	of C constraint.

testsuite/ChangeLog:

	PR target/69459
	* gcc.target/i386/pr69459.c: New test.

From-SVN: r232955
This commit is contained in:
Uros Bizjak 2016-01-28 23:32:47 +01:00
parent df113ce7de
commit aec0b19e79
6 changed files with 109 additions and 39 deletions
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38
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
2016-01-28 Uros Bizjak <ubizjak@gmail.com>
PR target/69459
* config/i386/constraints.md (C): Only accept constant zero operand.
(BC): New constraint.
* config/i386/sse.md (*mov<mode>_internal): Use BC constraint
instead of C constraint.
* doc/md.texi (Machine Constraints): Update description
of C constraint.
2016-01-28 Steve Ellcey <sellcey@imgtec.com>
PR target/68400
@ -61,7 +71,8 @@
2016-01-28 Sebastian Pop <s.pop@samsung.com>
* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Call codegen_error_p.
* graphite-isl-ast-to-gimple.c (binary_op_to_tree): Call
codegen_error_p.
(ternary_op_to_tree): Same.
(unary_op_to_tree): Same.
(nary_op_to_tree): Same.
@ -76,8 +87,8 @@
2016-01-28 Sebastian Pop <s.pop@samsung.com>
* graphite-isl-ast-to-gimple.c (get_rename_from_scev): Assert instead of
setting codegen_error to fail codegen.
* graphite-isl-ast-to-gimple.c (get_rename_from_scev): Assert
instead of setting codegen_error to fail codegen.
2016-01-28 Jason Merrill <jason@redhat.com>
@ -463,7 +474,8 @@
(compute_deps): Remove.
* graphite-isl-ast-to-gimple.c (print_schedule_ast): New.
(debug_schedule_ast): New.
(translate_isl_ast_to_gimple::scop_to_isl_ast): Call set_separate_option.
(translate_isl_ast_to_gimple::scop_to_isl_ast): Call
set_separate_option.
(graphite_regenerate_ast_isl): Add dump.
(translate_isl_ast_to_gimple::scop_to_isl_ast): Generate code
from scop->transformed_schedule.
@ -973,8 +985,10 @@
2016-01-21 Aditya Kumar <aditya.k7@samsung.com>
Sebastian Pop <s.pop@samsung.com>
* graphite-scop-detection.c (loop_is_valid_scop): Renamed loop_is_valid_in_scop.
(scop_detection::harmful_stmt_in_region): Renamed harmful_loop_in_region.
* graphite-scop-detection.c (loop_is_valid_scop): Renamed
loop_is_valid_in_scop.
(scop_detection::harmful_stmt_in_region): Renamed
harmful_loop_in_region.
Call loop_is_valid_in_scop.
2016-01-21 Aditya Kumar <aditya.k7@samsung.com>
@ -2326,14 +2340,18 @@
* config/i386/xm-djgpp.h (NATIVE_SYSTEM_HEADER_DIR): Define.
(MD_EXEC_PREFIX): Define (moved from config/i386/djgpp.h).
(STANDARD_STARTFILE_PREFIX_1): Define (moved from MD_STARTFILE_PREFIX in config/i386/djgpp.h).
(STANDARD_STARTFILE_PREFIX_2): Define identical to STANDARD_STARTFILE_PREFIX_1.
(STANDARD_STARTFILE_PREFIX_1): Define (moved from MD_STARTFILE_PREFIX
in config/i386/djgpp.h).
(STANDARD_STARTFILE_PREFIX_2): Define identical to
STANDARD_STARTFILE_PREFIX_1.
(LOCAL_INCLUDE_DIR): Define (moved from config/i386/djgpp.h).
(GCC_DRIVER_HOST_INITIALIZATION): Fix reporting fatal installation errors.
(GCC_DRIVER_HOST_INITIALIZATION): Fix reporting fatal
installation errors.
(MAX_OFILE_ALIGNMENT): Define to 128.
(HAVE_FTW_H): Undefine as DJGPP do not have nftw, but have ftw.h.
* config/i386/djgpp.c: New file. Add implementation of i386_djgpp_asm_named_section.
* config/i386/djgpp.c: New file. Add implementation of
i386_djgpp_asm_named_section.
* config/i386/djgpp.opt: Remove obsolete option -mbnu210.

9
gcc/config/i386/constraints.md
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@ -152,6 +152,7 @@
;; s Sibcall memory operand, not valid for TARGET_X32
;; w Call memory operand, not valid for TARGET_X32
;; z Constant call address operand.
;; C SSE constant operand.
(define_constraint "Bf"
"@internal Flags register operand."
@ -183,6 +184,10 @@
"@internal Constant call address operand."
(match_operand 0 "constant_call_address_operand"))
(define_constraint "BC"
"@internal SSE constant operand."
(match_test "standard_sse_constant_p (op)"))
;; Integer constant constraints.
(define_constraint "I"
"Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
@ -233,8 +238,8 @@
;; This can theoretically be any mode's CONST0_RTX.
(define_constraint "C"
"Standard SSE floating point constant."
(match_test "standard_sse_constant_p (op)"))
"SSE constant zero operand."
(match_test "standard_sse_constant_p (op) == 1"))
;; Constant-or-symbol-reference constraints.

2
gcc/config/i386/sse.md
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@ -833,7 +833,7 @@
(define_insn "*mov<mode>_internal"
[(set (match_operand:VMOVE 0 "nonimmediate_operand" "=v,v ,m")
(match_operand:VMOVE 1 "nonimmediate_or_sse_const_operand" "C ,vm,v"))]
(match_operand:VMOVE 1 "nonimmediate_or_sse_const_operand" "BC,vm,v"))]
"TARGET_SSE
&& (register_operand (operands[0], <MODE>mode)
|| register_operand (operands[1], <MODE>mode))"

2
gcc/doc/md.texi
View File

@ -4100,7 +4100,7 @@ Integer constant in the range 0 @dots{} 127, for 128-bit shifts.
Standard 80387 floating point constant.
@item C
Standard SSE floating point constant.
SSE constant zero operand.
@item e
32-bit signed integer constant, or a symbolic reference known

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2016-01-28 Uros Bizjak <ubizjak@gmail.com>
PR target/69459
* gcc.target/i386/pr69459.c: New test.
2016-01-28 Steve Ellcey <sellcey@imgtec.com>
PR target/68400

42
gcc/testsuite/gcc.target/i386/pr69459.c Normal file
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@ -0,0 +1,42 @@
/* PR target/69549 */
/* { dg-do run { target sse2_runtime } } */
/* { dg-options "-O2 -msse2" } */
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
typedef unsigned long long u64;
typedef unsigned char v16u8 __attribute__ ((vector_size (16)));
typedef unsigned short v16u16 __attribute__ ((vector_size (16)));
typedef unsigned int v16u32 __attribute__ ((vector_size (16)));
typedef unsigned long long v16u64 __attribute__ ((vector_size (16)));
u64 __attribute__((noinline, noclone))
foo (u8 u8_0, u16 u16_3, v16u8 v16u8_0, v16u16 v16u16_0, v16u32 v16u32_0, v16u64 v16u64_0, v16u8 v16u8_1, v16u16 v16u16_1, v16u32 v16u32_1, v16u64 v16u64_1, v16u8 v16u8_2, v16u16 v16u16_2, v16u32 v16u32_2, v16u64 v16u64_2, v16u8 v16u8_3, v16u16 v16u16_3, v16u32 v16u32_3, v16u64 v16u64_3)
{
v16u64_0 /= (v16u64){u16_3, ((0))} | 1;
v16u64_1 += (v16u64)~v16u32_0;
v16u16_1 /= (v16u16){-v16u64_3[1]} | 1;
v16u64_3[1] -= 0x1fffffff;
v16u32_2 /= (v16u32)-v16u64_0 | 1;
v16u32_1 += ~v16u32_1;
v16u16_3 %= (v16u16){0xfff, v16u32_2[3], v16u8_0[14]} | 1;
v16u64_3 -= (v16u64)v16u32_2;
if (v16u64_1[1] >= 1) {
v16u64_0 %= (v16u64){v16u32_0[1]} | 1;
v16u32_1[1] %= 0x5fb856;
v16u64_1 |= -v16u64_0;
}
v16u8_0 *= (v16u8)v16u32_1;
return u8_0 + v16u8_0 [12] + v16u8_0 [13] + v16u8_0 [14] + v16u8_0 [15] + v16u16_0 [0] + v16u16_0 [1] + v16u32_0 [0] + v16u32_0 [1] + v16u32_0 [2] + v16u32_0 [3] + v16u64_0 [0] + v16u64_0 [1] + v16u8_1 [9] + v16u8_1 [10] + v16u8_1 [11] + v16u8_1 [15] + v16u16_1 [0] + v16u16_1 [1] + v16u16_1 [3] + v16u64_1 [0] + v16u64_1 [1] + v16u8_2 [3] + v16u8_2 [4] + v16u8_2 [5] + v16u8_2 [0] + v16u32_2 [1] + v16u32_2 [2] + v16u32_2 [3] + v16u64_2 [0] + v16u64_2 [1] + v16u8_3 [0] + v16u16_3 [6] + v16u16_3[7] + v16u32_3[1] + v16u32_3[2] + v16u64_3[0] + v16u64_3[1];
}
int
main ()
{
u64 x = foo(1, 1, (v16u8){1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1, 1, 1, 1, 1}, (v16u16){1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1}, (v16u32){1}, (v16u64){1});
if (x != 0xffffffffe0000209)
__builtin_abort();
return 0;
}