arm: [MVE[ Add vqdmlashq intrinsics (PR target/96914)
This patch adds: vqdmlashq_m_n_s16 vqdmlashq_m_n_s32 vqdmlashq_m_n_s8 vqdmlashq_n_s16 vqdmlashq_n_s32 vqdmlashq_n_s8 2020-10-08 Christophe Lyon <christophe.lyon@linaro.org> gcc/ PR target/96914 * config/arm/arm_mve.h (vqdmlashq, vqdmlashq_m): Define. * config/arm/arm_mve_builtins.def (vqdmlashq_n_s) (vqdmlashq_m_n_s,): New. * config/arm/unspecs.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New unspecs. * config/arm/iterators.md (VQDMLASHQ_N_S, VQDMLASHQ_M_N_S): New attributes. (VQDMLASHQ_N): New iterator. * config/arm/mve.md (mve_vqdmlashq_n_, mve_vqdmlashq_m_n_s): New patterns. gcc/testsuite/ PR target/96914 * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: New test. * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: New test.
This commit is contained in:
Christophe Lyon
parent
f18eeb6b95
commit
afb198ee37
@ -141,6 +141,7 @@
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#define vrev64q_m(__inactive, __a, __p) __arm_vrev64q_m(__inactive, __a, __p)
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#define vqrdmlashq(__a, __b, __c) __arm_vqrdmlashq(__a, __b, __c)
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#define vqrdmlahq(__a, __b, __c) __arm_vqrdmlahq(__a, __b, __c)
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#define vqdmlashq(__a, __b, __c) __arm_vqdmlashq(__a, __b, __c)
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#define vqdmlahq(__a, __b, __c) __arm_vqdmlahq(__a, __b, __c)
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#define vmvnq_m(__inactive, __a, __p) __arm_vmvnq_m(__inactive, __a, __p)
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#define vmlasq(__a, __b, __c) __arm_vmlasq(__a, __b, __c)
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@ -260,6 +261,7 @@
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#define vorrq_m(__inactive, __a, __b, __p) __arm_vorrq_m(__inactive, __a, __b, __p)
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#define vqaddq_m(__inactive, __a, __b, __p) __arm_vqaddq_m(__inactive, __a, __b, __p)
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#define vqdmladhq_m(__inactive, __a, __b, __p) __arm_vqdmladhq_m(__inactive, __a, __b, __p)
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#define vqdmlashq_m(__a, __b, __c, __p) __arm_vqdmlashq_m(__a, __b, __c, __p)
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#define vqdmladhxq_m(__inactive, __a, __b, __p) __arm_vqdmladhxq_m(__inactive, __a, __b, __p)
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#define vqdmlahq_m(__a, __b, __c, __p) __arm_vqdmlahq_m(__a, __b, __c, __p)
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#define vqdmlsdhq_m(__inactive, __a, __b, __p) __arm_vqdmlsdhq_m(__inactive, __a, __b, __p)
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@ -1306,6 +1308,7 @@
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#define vqdmlsdhxq_s8(__inactive, __a, __b) __arm_vqdmlsdhxq_s8(__inactive, __a, __b)
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#define vqdmlsdhq_s8(__inactive, __a, __b) __arm_vqdmlsdhq_s8(__inactive, __a, __b)
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#define vqdmlahq_n_s8(__a, __b, __c) __arm_vqdmlahq_n_s8(__a, __b, __c)
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#define vqdmlashq_n_s8(__a, __b, __c) __arm_vqdmlashq_n_s8(__a, __b, __c)
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#define vqdmladhxq_s8(__inactive, __a, __b) __arm_vqdmladhxq_s8(__inactive, __a, __b)
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#define vqdmladhq_s8(__inactive, __a, __b) __arm_vqdmladhq_s8(__inactive, __a, __b)
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#define vmlsdavaxq_s8(__a, __b, __c) __arm_vmlsdavaxq_s8(__a, __b, __c)
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@ -1390,6 +1393,7 @@
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#define vqrdmladhq_s16(__inactive, __a, __b) __arm_vqrdmladhq_s16(__inactive, __a, __b)
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#define vqdmlsdhxq_s16(__inactive, __a, __b) __arm_vqdmlsdhxq_s16(__inactive, __a, __b)
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#define vqdmlsdhq_s16(__inactive, __a, __b) __arm_vqdmlsdhq_s16(__inactive, __a, __b)
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#define vqdmlashq_n_s16(__a, __b, __c) __arm_vqdmlashq_n_s16(__a, __b, __c)
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#define vqdmlahq_n_s16(__a, __b, __c) __arm_vqdmlahq_n_s16(__a, __b, __c)
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#define vqdmladhxq_s16(__inactive, __a, __b) __arm_vqdmladhxq_s16(__inactive, __a, __b)
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#define vqdmladhq_s16(__inactive, __a, __b) __arm_vqdmladhq_s16(__inactive, __a, __b)
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@ -1475,6 +1479,7 @@
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#define vqrdmladhq_s32(__inactive, __a, __b) __arm_vqrdmladhq_s32(__inactive, __a, __b)
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#define vqdmlsdhxq_s32(__inactive, __a, __b) __arm_vqdmlsdhxq_s32(__inactive, __a, __b)
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#define vqdmlsdhq_s32(__inactive, __a, __b) __arm_vqdmlsdhq_s32(__inactive, __a, __b)
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#define vqdmlashq_n_s32(__a, __b, __c) __arm_vqdmlashq_n_s32(__a, __b, __c)
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#define vqdmlahq_n_s32(__a, __b, __c) __arm_vqdmlahq_n_s32(__a, __b, __c)
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#define vqdmladhxq_s32(__inactive, __a, __b) __arm_vqdmladhxq_s32(__inactive, __a, __b)
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#define vqdmladhq_s32(__inactive, __a, __b) __arm_vqdmladhq_s32(__inactive, __a, __b)
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@ -1901,6 +1906,9 @@
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#define vqdmladhxq_m_s8(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s8(__inactive, __a, __b, __p)
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#define vqdmladhxq_m_s32(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s32(__inactive, __a, __b, __p)
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#define vqdmladhxq_m_s16(__inactive, __a, __b, __p) __arm_vqdmladhxq_m_s16(__inactive, __a, __b, __p)
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#define vqdmlashq_m_n_s8(__a, __b, __c, __p) __arm_vqdmlashq_m_n_s8(__a, __b, __c, __p)
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#define vqdmlashq_m_n_s32(__a, __b, __c, __p) __arm_vqdmlashq_m_n_s32(__a, __b, __c, __p)
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#define vqdmlashq_m_n_s16(__a, __b, __c, __p) __arm_vqdmlashq_m_n_s16(__a, __b, __c, __p)
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#define vqdmlahq_m_n_s8(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s8(__a, __b, __c, __p)
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#define vqdmlahq_m_n_s32(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s32(__a, __b, __c, __p)
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#define vqdmlahq_m_n_s16(__a, __b, __c, __p) __arm_vqdmlahq_m_n_s16(__a, __b, __c, __p)
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@ -7422,6 +7430,13 @@ __arm_vqrdmlashq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
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return __builtin_mve_vqrdmlashq_n_sv16qi (__a, __b, __c);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
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{
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return __builtin_mve_vqdmlashq_n_sv16qi (__a, __b, __c);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c)
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@ -8017,6 +8032,13 @@ __arm_vqrdmlashq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
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return __builtin_mve_vqrdmlashq_n_sv8hi (__a, __b, __c);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
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{
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return __builtin_mve_vqdmlashq_n_sv8hi (__a, __b, __c);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c)
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@ -8612,6 +8634,13 @@ __arm_vqrdmlashq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
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return __builtin_mve_vqrdmlashq_n_sv4si (__a, __b, __c);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
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{
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return __builtin_mve_vqdmlashq_n_sv4si (__a, __b, __c);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c)
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@ -11139,6 +11168,27 @@ __arm_vqrdmlashq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_
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return __builtin_mve_vqrdmlashq_m_n_sv8hi (__a, __b, __c, __p);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m_n_s8 (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
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{
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return __builtin_mve_vqdmlashq_m_n_sv16qi (__a, __b, __c, __p);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m_n_s16 (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
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{
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return __builtin_mve_vqdmlashq_m_n_sv8hi (__a, __b, __c, __p);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m_n_s32 (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
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{
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return __builtin_mve_vqdmlashq_m_n_sv4si (__a, __b, __c, __p);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlsdhq_m_s8 (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
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@ -24202,6 +24252,13 @@ __arm_vqrdmlashq (int8x16_t __a, int8x16_t __b, int8_t __c)
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return __arm_vqrdmlashq_n_s8 (__a, __b, __c);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq (int8x16_t __a, int8x16_t __b, int8_t __c)
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{
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return __arm_vqdmlashq_n_s8 (__a, __b, __c);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq (int8x16_t __a, int8x16_t __b, int8_t __c)
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@ -24797,6 +24854,13 @@ __arm_vqrdmlashq (int16x8_t __a, int16x8_t __b, int16_t __c)
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return __arm_vqrdmlashq_n_s16 (__a, __b, __c);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq (int16x8_t __a, int16x8_t __b, int16_t __c)
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{
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return __arm_vqdmlashq_n_s16 (__a, __b, __c);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq (int16x8_t __a, int16x8_t __b, int16_t __c)
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@ -25392,6 +25456,13 @@ __arm_vqrdmlashq (int32x4_t __a, int32x4_t __b, int32_t __c)
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return __arm_vqrdmlashq_n_s32 (__a, __b, __c);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq (int32x4_t __a, int32x4_t __b, int32_t __c)
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{
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return __arm_vqdmlashq_n_s32 (__a, __b, __c);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlahq (int32x4_t __a, int32x4_t __b, int32_t __c)
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@ -27919,6 +27990,27 @@ __arm_vqrdmlashq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
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return __arm_vqrdmlashq_m_n_s16 (__a, __b, __c, __p);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m (int8x16_t __a, int8x16_t __b, int8_t __c, mve_pred16_t __p)
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{
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return __arm_vqdmlashq_m_n_s8 (__a, __b, __c, __p);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m (int16x8_t __a, int16x8_t __b, int16_t __c, mve_pred16_t __p)
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{
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return __arm_vqdmlashq_m_n_s16 (__a, __b, __c, __p);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqdmlashq_m (int32x4_t __a, int32x4_t __b, int32_t __c, mve_pred16_t __p)
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{
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return __arm_vqdmlashq_m_n_s32 (__a, __b, __c, __p);
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}
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__extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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__arm_vqrdmlsdhq_m (int8x16_t __inactive, int8x16_t __a, int8x16_t __b, mve_pred16_t __p)
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@ -36790,6 +36882,14 @@ extern void *__ARM_undef;
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int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
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int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
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#define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
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__typeof(p1) __p1 = (p1); \
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__typeof(p2) __p2 = (p2); \
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_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
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int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
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int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
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int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
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#define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
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__typeof(p1) __p1 = (p1); \
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__typeof(p2) __p2 = (p2); \
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@ -39262,6 +39362,14 @@ extern void *__ARM_undef;
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int (*)[__ARM_mve_type_uint16x8_t][__ARM_mve_type_uint16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u16 (__ARM_mve_coerce(__p0, uint16x8_t), __ARM_mve_coerce(__p1, uint16x8_t), __ARM_mve_coerce(__p2, uint16_t)), \
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int (*)[__ARM_mve_type_uint32x4_t][__ARM_mve_type_uint32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_n_u32 (__ARM_mve_coerce(__p0, uint32x4_t), __ARM_mve_coerce(__p1, uint32x4_t), __ARM_mve_coerce(__p2, uint32_t)));})
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#define __arm_vqdmlashq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
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__typeof(p1) __p1 = (p1); \
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__typeof(p2) __p2 = (p2); \
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_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
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int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t)), \
|
||||
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t)), \
|
||||
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t)));})
|
||||
|
||||
#define __arm_vqrdmlahq(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
|
||||
__typeof(p1) __p1 = (p1); \
|
||||
__typeof(p2) __p2 = (p2); \
|
||||
@ -40803,6 +40911,14 @@ extern void *__ARM_undef;
|
||||
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
|
||||
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqrdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
|
||||
|
||||
#define __arm_vqdmlashq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
|
||||
__typeof(p1) __p1 = (p1); \
|
||||
__typeof(p2) __p2 = (p2); \
|
||||
_Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)][__ARM_mve_typeid(__p2)])0, \
|
||||
int (*)[__ARM_mve_type_int8x16_t][__ARM_mve_type_int8x16_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s8 (__ARM_mve_coerce(__p0, int8x16_t), __ARM_mve_coerce(__p1, int8x16_t), __ARM_mve_coerce(__p2, int8_t), p3), \
|
||||
int (*)[__ARM_mve_type_int16x8_t][__ARM_mve_type_int16x8_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s16 (__ARM_mve_coerce(__p0, int16x8_t), __ARM_mve_coerce(__p1, int16x8_t), __ARM_mve_coerce(__p2, int16_t), p3), \
|
||||
int (*)[__ARM_mve_type_int32x4_t][__ARM_mve_type_int32x4_t][__ARM_mve_type_int_n]: __arm_vqdmlashq_m_n_s32 (__ARM_mve_coerce(__p0, int32x4_t), __ARM_mve_coerce(__p1, int32x4_t), __ARM_mve_coerce(__p2, int32_t), p3));})
|
||||
|
||||
#define __arm_vqrshlq_m(p0,p1,p2,p3) ({ __typeof(p0) __p0 = (p0); \
|
||||
__typeof(p1) __p1 = (p1); \
|
||||
__typeof(p2) __p2 = (p2); \
|
||||
|
||||
@ -384,6 +384,7 @@ VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqrdmladhq_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlsdhxq_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlsdhq_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlahq_n_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmlashq_n_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmladhxq_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vqdmladhq_s, v16qi, v8hi, v4si)
|
||||
VAR3 (TERNOP_NONE_NONE_NONE_NONE, vmlsdavaxq_s, v16qi, v8hi, v4si)
|
||||
@ -574,6 +575,7 @@ VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmulhq_m_n_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlsdhxq_m_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlsdhq_m_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlahq_m_n_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmlashq_m_n_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmladhxq_m_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqdmladhq_m_s, v16qi, v8hi, v4si)
|
||||
VAR3 (QUADOP_NONE_NONE_NONE_NONE_UNONE, vqaddq_m_s, v16qi, v8hi, v4si)
|
||||
|
||||
@ -1285,6 +1285,7 @@
|
||||
(VMLAQ_N_U "u") (VMLASQ_N_S "s") (VMLASQ_N_U "u")
|
||||
(VMVNQ_M_S "s") (VMVNQ_M_U "u") (VPSELQ_S "s")
|
||||
(VPSELQ_U "u") (VQDMLAHQ_N_S "s") (VQDMLAHQ_N_U "u")
|
||||
(VQDMLASHQ_N_S "s")
|
||||
(VQRDMLAHQ_N_S "s") (VQRDMLAHQ_N_U "u")
|
||||
(VQRDMLASHQ_N_S "s") (VQRDMLASHQ_N_U "u")
|
||||
(VQRSHLQ_M_N_S "s") (VQRSHLQ_M_N_U "u")
|
||||
@ -1326,6 +1327,7 @@
|
||||
(VMULQ_M_S "s") (VQSHLQ_M_N_U "u") (VSLIQ_M_N_U "u")
|
||||
(VMLADAVAQ_P_S "s") (VQRSHLQ_M_U "u")
|
||||
(VMULLBQ_INT_M_U "u") (VSHLQ_M_N_U "u") (VQSUBQ_M_U "u")
|
||||
(VQDMLASHQ_M_N_S "s")
|
||||
(VQRDMLASHQ_M_N_U "u") (VRSHRQ_M_N_S "s")
|
||||
(VORNQ_M_S "s") (VCADDQ_ROT270_M_S "s") (VRHADDQ_M_U "u")
|
||||
(VRSHRQ_M_N_U "u") (VMLASQ_M_N_U "u") (VHSUBQ_M_U "u")
|
||||
@ -1577,6 +1579,7 @@
|
||||
(define_int_iterator VMVNQ_M [VMVNQ_M_S VMVNQ_M_U])
|
||||
(define_int_iterator VPSELQ [VPSELQ_S VPSELQ_U])
|
||||
(define_int_iterator VQDMLAHQ_N [VQDMLAHQ_N_S VQDMLAHQ_N_U])
|
||||
(define_int_iterator VQDMLASHQ_N [VQDMLASHQ_N_S])
|
||||
(define_int_iterator VQRDMLAHQ_N [VQRDMLAHQ_N_S VQRDMLAHQ_N_U])
|
||||
(define_int_iterator VQRDMLASHQ_N [VQRDMLASHQ_N_S VQRDMLASHQ_N_U])
|
||||
(define_int_iterator VQRSHLQ_M_N [VQRSHLQ_M_N_S VQRSHLQ_M_N_U])
|
||||
|
||||
@ -3677,6 +3677,22 @@
|
||||
[(set_attr "type" "mve_move")
|
||||
])
|
||||
|
||||
;;
|
||||
;; [vqdmlashq_n_s])
|
||||
;;
|
||||
(define_insn "mve_vqdmlashq_n_<supf><mode>"
|
||||
[
|
||||
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
|
||||
(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
|
||||
(match_operand:MVE_2 2 "s_register_operand" "w")
|
||||
(match_operand:<V_elem> 3 "s_register_operand" "r")]
|
||||
VQDMLASHQ_N))
|
||||
]
|
||||
"TARGET_HAVE_MVE"
|
||||
"vqdmlash.s%#<V_sz_elem>\t%q0, %q2, %3"
|
||||
[(set_attr "type" "mve_move")
|
||||
])
|
||||
|
||||
;;
|
||||
;; [vqnegq_m_s])
|
||||
;;
|
||||
@ -5903,6 +5919,23 @@
|
||||
[(set_attr "type" "mve_move")
|
||||
(set_attr "length""8")])
|
||||
|
||||
;;
|
||||
;; [vqdmlashq_m_n_s])
|
||||
;;
|
||||
(define_insn "mve_vqdmlashq_m_n_s<mode>"
|
||||
[
|
||||
(set (match_operand:MVE_2 0 "s_register_operand" "=w")
|
||||
(unspec:MVE_2 [(match_operand:MVE_2 1 "s_register_operand" "0")
|
||||
(match_operand:MVE_2 2 "s_register_operand" "w")
|
||||
(match_operand:<V_elem> 3 "s_register_operand" "r")
|
||||
(match_operand:HI 4 "vpr_register_operand" "Up")]
|
||||
VQDMLASHQ_M_N_S))
|
||||
]
|
||||
"TARGET_HAVE_MVE"
|
||||
"vpst\;vqdmlasht.s%#<V_sz_elem>\t%q0, %q2, %3"
|
||||
[(set_attr "type" "mve_move")
|
||||
(set_attr "length""8")])
|
||||
|
||||
;;
|
||||
;; [vqrdmlahq_m_n_s])
|
||||
;;
|
||||
|
||||
@ -877,6 +877,7 @@
|
||||
VQABSQ_M_S
|
||||
VQDMLAHQ_N_S
|
||||
VQDMLAHQ_N_U
|
||||
VQDMLASHQ_N_S
|
||||
VQNEGQ_M_S
|
||||
VQRDMLADHQ_S
|
||||
VQRDMLADHXQ_S
|
||||
@ -1069,6 +1070,7 @@
|
||||
VRHADDQ_M_S
|
||||
VMULQ_M_S
|
||||
VMULQ_M_U
|
||||
VQDMLASHQ_M_N_S
|
||||
VQRDMLASHQ_M_N_S
|
||||
VRSHLQ_M_S
|
||||
VRSHLQ_M_U
|
||||
|
||||
@ -0,0 +1,23 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int16x8_t
|
||||
foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m_n_s16 (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s16" } } */
|
||||
|
||||
int16x8_t
|
||||
foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s16" } } */
|
||||
@ -0,0 +1,23 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int32x4_t
|
||||
foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m_n_s32 (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s32" } } */
|
||||
|
||||
int32x4_t
|
||||
foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s32" } } */
|
||||
@ -0,0 +1,23 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int8x16_t
|
||||
foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m_n_s8 (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s8" } } */
|
||||
|
||||
int8x16_t
|
||||
foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
|
||||
{
|
||||
return vqdmlashq_m (a, b, c, p);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vpst" } } */
|
||||
/* { dg-final { scan-assembler "vqdmlasht.s8" } } */
|
||||
@ -0,0 +1,21 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int16x8_t
|
||||
foo (int16x8_t a, int16x8_t b, int16_t c)
|
||||
{
|
||||
return vqdmlashq_n_s16 (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s16" } } */
|
||||
|
||||
int16x8_t
|
||||
foo1 (int16x8_t a, int16x8_t b, int16_t c)
|
||||
{
|
||||
return vqdmlashq (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s16" } } */
|
||||
@ -0,0 +1,21 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int32x4_t
|
||||
foo (int32x4_t a, int32x4_t b, int32_t c)
|
||||
{
|
||||
return vqdmlashq_n_s32 (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s32" } } */
|
||||
|
||||
int32x4_t
|
||||
foo1 (int32x4_t a, int32x4_t b, int32_t c)
|
||||
{
|
||||
return vqdmlashq (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s32" } } */
|
||||
21
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
Normal file
21
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
Normal file
@ -0,0 +1,21 @@
|
||||
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
|
||||
/* { dg-add-options arm_v8_1m_mve } */
|
||||
/* { dg-additional-options "-O2" } */
|
||||
|
||||
#include "arm_mve.h"
|
||||
|
||||
int8x16_t
|
||||
foo (int8x16_t a, int8x16_t b, int8_t c)
|
||||
{
|
||||
return vqdmlashq_n_s8 (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s8" } } */
|
||||
|
||||
int8x16_t
|
||||
foo1 (int8x16_t a, int8x16_t b, int8_t c)
|
||||
{
|
||||
return vqdmlashq (a, b, c);
|
||||
}
|
||||
|
||||
/* { dg-final { scan-assembler "vqdmlash.s8" } } */
|
||||
Loading…
Reference in New Issue
Block a user