aarch64: Fix an ICE in aarch64_short_vector_p [PR95459]

In aarch64_short_vector_p, we are simply checking whether a type (and a mode)
is a 64/128-bit short vector or not.  This should not be affected by the value
of TARGET_SVE.  Simply leave later code to report an error if SVE is disabled.

2020-06-02  Felix Yang  <felix.yang@huawei.com>

gcc/
	PR target/95459
	* config/aarch64/aarch64.c (aarch64_short_vector_p):
	Leave later code to report an error if SVE is disabled.

gcc/testsuite/
	PR target/95459
	* gcc.target/aarch64/mgeneral-regs_6.c: New test.
This commit is contained in:
Fei Yang 2020-06-02 18:17:34 +01:00 committed by Richard Sandiford
parent eca833b812
commit b2672dd630
2 changed files with 17 additions and 1 deletions

View File

@ -16800,7 +16800,8 @@ aarch64_short_vector_p (const_tree type,
{
/* Rely only on the type, not the mode, when processing SVE types. */
if (type && aarch64_some_values_include_pst_objects_p (type))
gcc_assert (aarch64_sve_mode_p (mode));
/* Leave later code to report an error if SVE is disabled. */
gcc_assert (!TARGET_SVE || aarch64_sve_mode_p (mode));
else
size = GET_MODE_SIZE (mode);
}

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@ -0,0 +1,15 @@
/* { dg-options "-O2 -march=armv8.2-a+sve" } */
/* { dg-prune-output "compilation terminated" } */
#include <arm_sve.h>
#pragma GCC push_options
#pragma GCC target "general-regs-only"
svint8x2_t
foo (svint8_t x0, svint8_t x1) /* { dg-error {'foo' requires the SVE ISA extension} } */
{
return svcreate2 (x0, x1); /* { dg-error {ACLE function 'svcreate2_s8' is incompatible with the use of '-mgeneral-regs-only'} } */
}
#pragma GCC pop_options