diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a93f5a1a0e6..57140ae7f2d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-07-07 Eric Botcazou + + PR target/49660 + * config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add + MASK_V8PLUS, remove commented out flag and reorder. + 2011-07-07 Jakub Jelinek PR c/49644 diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h index 6661c21945c..12fef68eaa9 100644 --- a/gcc/config/sparc/sol2.h +++ b/gcc/config/sparc/sol2.h @@ -20,16 +20,17 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see . */ +/* Solaris allows 64-bit out and global registers to be used in 32-bit mode. + sparc_override_options will disable V8+ if either not generating V9 code + or generating 64-bit code. */ #undef TARGET_DEFAULT #ifdef TARGET_64BIT_DEFAULT #define TARGET_DEFAULT \ - (MASK_V9 + MASK_PTR64 + MASK_64BIT /* + MASK_HARD_QUAD */ + \ - MASK_STACK_BIAS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128) + (MASK_V9 + MASK_64BIT + MASK_PTR64 + MASK_STACK_BIAS + \ + MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128) #else -/* Solaris allows 64 bit out and global registers in 32 bit mode. - sparc_override_options will disable V8+ if not generating V9 code. */ -#define TARGET_DEFAULT (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU \ - + MASK_LONG_DOUBLE_128) +#define TARGET_DEFAULT \ + (MASK_V8PLUS + MASK_APP_REGS + MASK_FPU + MASK_LONG_DOUBLE_128) #endif /* The default code model used to be CM_MEDANY on Solaris diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3aa5f91273c..63dda0097c3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2011-07-07 Rainer Orth + + * gcc.target/sparc/cas64.c: New test. + 2011-07-07 Jakub Jelinek PR c/49644 diff --git a/gcc/testsuite/gcc.target/sparc/cas64.c b/gcc/testsuite/gcc.target/sparc/cas64.c new file mode 100644 index 00000000000..ed27cd7cc62 --- /dev/null +++ b/gcc/testsuite/gcc.target/sparc/cas64.c @@ -0,0 +1,15 @@ +/* PR target/49660 */ + +/* { dg-do compile { target sparc*-*-solaris2.* } } */ + +#include + +extern int64_t *val, old, new; + +int +cas64 (void) +{ + return __sync_bool_compare_and_swap (val, old, new); +} + +/* { dg-final { scan-assembler-not "compare_and_swap_8" } } */