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Backported from mainline
	2012-10-19  Zhenqiang Chen <zhenqiang.chen@linaro.org>

	PR target/54892
	* config/arm/arm.c (arm_expand_compare_and_swap): Use SImode to make
	sure the mode is correct when falling through from above cases.

	gcc/testsuite/ChangeLog
	Backported from mainline
	2012-10-19  Zhenqiang Chen <zhenqiang.chen@linaro.org>

	PR target/54892
	* gcc.target/arm/pr54892.c: New.

From-SVN: r192610
This commit is contained in:
Zhenqiang Chen 2012-10-19 09:39:13 +00:00 committed by Xuepeng Guo
parent 003316b488
commit b3163c0ad6
4 changed files with 26 additions and 2 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2012-10-19 Zhenqiang Chen <zhenqiang.chen@linaro.org>
Backported from mainline
2012-10-19 Zhenqiang Chen <zhenqiang.chen@linaro.org>
PR target/54892
* config/arm/arm.c (arm_expand_compare_and_swap): Use SImode to make
sure the mode is correct when falling through from above cases.
2012-10-19 Alan Modra <amodra@gmail.com>
* configure.ac (HAVE_LD_NO_DOT_SYMS): Set if using gold.

4
gcc/config/arm/arm.c
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@ -24859,8 +24859,8 @@ arm_expand_compare_and_swap (rtx operands[])
case SImode:
/* Force the value into a register if needed. We waited until after
the zero-extension above to do this properly. */
if (!arm_add_operand (oldval, mode))
oldval = force_reg (mode, oldval);
if (!arm_add_operand (oldval, SImode))
oldval = force_reg (SImode, oldval);
break;
case DImode:

8
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,11 @@
2012-10-19 Zhenqiang Chen <zhenqiang.chen@linaro.org>
Backport from mainline
2012-10-19 Zhenqiang Chen <zhenqiang.chen@linaro.org>
PR target/54892
* gcc.target/arm/pr54892.c: New.
2012-10-16 Andrey Belevantsev <abel@ispras.ru>
Backport from mainline

7
gcc/testsuite/gcc.target/arm/pr54892.c Normal file
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@ -0,0 +1,7 @@
/* { dg-do compile } */
int set_role(unsigned char role_id, short m_role)
{
return __sync_bool_compare_and_swap(&m_role, -1, role_id);
}