[AArch64][4/14] Create TARGET_FIX_ERR_A53_835769 and use that instead of aarch64_fix_a53_err835769
* config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_835769_DEFAULT): Always define to 0 or 1. (TARGET_FIX_ERR_A53_835769): New macro. * config/aarch64/aarch64.c (aarch64_override_options_internal): Remove handling of opts->x_aarch64_fix_a53_err835769. (aarch64_madd_needs_nop): Check for TARGET_FIX_ERR_A53_835769 rather than aarch64_fix_a53_err835769. * config/aarch64/aarch64-elf-raw.h: Update for above changes. * config/aarch64/aarch64-linux.h: Likewise. From-SVN: r226556
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@ -1,3 +1,15 @@
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2015-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_835769_DEFAULT): Always
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define to 0 or 1.
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(TARGET_FIX_ERR_A53_835769): New macro.
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* config/aarch64/aarch64.c (aarch64_override_options_internal): Remove
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handling of opts->x_aarch64_fix_a53_err835769.
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(aarch64_madd_needs_nop): Check for TARGET_FIX_ERR_A53_835769 rather
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than aarch64_fix_a53_err835769.
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* config/aarch64/aarch64-elf-raw.h: Update for above changes.
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* config/aarch64/aarch64-linux.h: Likewise.
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2015-08-04 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (ix86_expand_int_movcc): Check result of
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@ -27,7 +27,7 @@
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" crtend%O%s crtn%O%s " \
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"%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
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#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
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#if TARGET_FIX_ERR_A53_835769_DEFAULT
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#define CA53_ERR_835769_SPEC \
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" %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
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#else
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@ -45,7 +45,7 @@
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%{mbig-endian:-EB} %{mlittle-endian:-EL} \
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-maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
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#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
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#if TARGET_FIX_ERR_A53_835769_DEFAULT
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#define CA53_ERR_835769_SPEC \
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" %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
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#else
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@ -7542,15 +7542,6 @@ aarch64_override_options_internal (struct gcc_options *opts)
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if (opts->x_flag_strict_volatile_bitfields < 0 && abi_version_at_least (2))
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opts->x_flag_strict_volatile_bitfields = 1;
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if (opts->x_aarch64_fix_a53_err835769 == 2)
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{
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#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
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opts->x_aarch64_fix_a53_err835769 = 1;
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#else
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opts->x_aarch64_fix_a53_err835769 = 0;
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#endif
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}
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/* -mgeneral-regs-only sets a mask in target_flags, make sure that
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aarch64_isa_flags does not contain the FP/SIMD/Crypto feature flags
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in case some code tries reading aarch64_isa_flags directly to check if
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@ -8985,7 +8976,7 @@ aarch64_madd_needs_nop (rtx_insn* insn)
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rtx_insn *prev;
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rtx body;
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if (!aarch64_fix_a53_err835769)
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if (!TARGET_FIX_ERR_A53_835769)
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return false;
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if (recog_memoized (insn) < 0)
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@ -235,6 +235,20 @@ extern unsigned long aarch64_isa_flags;
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/* CRC instructions that can be enabled through +crc arch extension. */
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#define TARGET_CRC32 (AARCH64_ISA_CRC)
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/* Make sure this is always defined so we don't have to check for ifdefs
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but rather use normal ifs. */
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#ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
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#define TARGET_FIX_ERR_A53_835769_DEFAULT 0
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#else
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#undef TARGET_FIX_ERR_A53_835769_DEFAULT
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#define TARGET_FIX_ERR_A53_835769_DEFAULT 1
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#endif
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/* Apply the workaround for Cortex-A53 erratum 835769. */
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#define TARGET_FIX_ERR_A53_835769 \
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((aarch64_fix_a53_err835769 == 2) \
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? TARGET_FIX_ERR_A53_835769_DEFAULT : aarch64_fix_a53_err835769)
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/* Standard register usage. */
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/* 31 64-bit general purpose registers R0-R30:
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