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merge adjust_cost and adjust_cost_2 target hooks 

gcc/ChangeLog:

2016-07-28  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* config/alpha/alpha.c (alpha_adjust_cost): Adjust.
	* config/arm/arm-protos.h (struct tune_params): Likewise.
	* config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
	(cortex_a9_sched_adjust_cost): Likewise.
	(fa726te_sched_adjust_cost): Likewise.
	(arm_adjust_cost): Likewise.
	* config/bfin/bfin.c (bfin_adjust_cost): Likewise.
	* config/c6x/c6x.c (c6x_adjust_cost): Likewise.
	* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise.
	* config/i386/i386.c (ix86_adjust_cost): Likewise.
	* config/ia64/ia64.c: Likewise.
	* config/m68k/m68k.c: Likewise.
	* config/mep/mep.c (mep_adjust_cost): Likewise.
	* config/microblaze/microblaze.c (microblaze_adjust_cost):
	* Likewise.
	* config/mips/mips.c (mips_adjust_cost): Likewise.
	* config/mn10300/mn10300.c (mn10300_adjust_sched_cost):
	* Likewise.
	* config/pa/pa.c (pa_adjust_cost): Likewise.
	* config/rs6000/rs6000.c (rs6000_adjust_cost): Likewise.
	(rs6000_debug_adjust_cost): Likewise.
	* config/sh/sh.c (sh_adjust_cost): Likewise.
	* config/sparc/sparc.c (supersparc_adjust_cost): Likewise.
	(hypersparc_adjust_cost): Likewise.
	(sparc_adjust_cost): Likewise.
	* config/spu/spu.c (spu_sched_adjust_cost): Likewise.
	* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Likewise.
	* config/tilepro/tilepro.c (tilepro_sched_adjust_cost):
	* Likewise.
	* config/visium/visium.c (visium_adjust_cost): Likewise.
	* doc/tm.texi: Regenerate.
	* haifa-sched.c (dep_cost_1): Adjust.
	* target.def: Merge adjust_cost and adjust_cost_2.

From-SVN: r238814
This commit is contained in:
Trevor Saunders 2016-07-28 11:01:49 +00:00 committed by Trevor Saunders
parent 30a7199a19
commit b505225ba4
24 changed files with 158 additions and 135 deletions
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36
gcc/ChangeLog
View File

@ -1,3 +1,39 @@
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/alpha/alpha.c (alpha_adjust_cost): Adjust.
* config/arm/arm-protos.h (struct tune_params): Likewise.
* config/arm/arm.c (xscale_sched_adjust_cost): Likewise.
(cortex_a9_sched_adjust_cost): Likewise.
(fa726te_sched_adjust_cost): Likewise.
(arm_adjust_cost): Likewise.
* config/bfin/bfin.c (bfin_adjust_cost): Likewise.
* config/c6x/c6x.c (c6x_adjust_cost): Likewise.
* config/epiphany/epiphany.c (epiphany_adjust_cost): Likewise.
* config/i386/i386.c (ix86_adjust_cost): Likewise.
* config/ia64/ia64.c: Likewise.
* config/m68k/m68k.c: Likewise.
* config/mep/mep.c (mep_adjust_cost): Likewise.
* config/microblaze/microblaze.c (microblaze_adjust_cost):
* Likewise.
* config/mips/mips.c (mips_adjust_cost): Likewise.
* config/mn10300/mn10300.c (mn10300_adjust_sched_cost):
* Likewise.
* config/pa/pa.c (pa_adjust_cost): Likewise.
* config/rs6000/rs6000.c (rs6000_adjust_cost): Likewise.
(rs6000_debug_adjust_cost): Likewise.
* config/sh/sh.c (sh_adjust_cost): Likewise.
* config/sparc/sparc.c (supersparc_adjust_cost): Likewise.
(hypersparc_adjust_cost): Likewise.
(sparc_adjust_cost): Likewise.
* config/spu/spu.c (spu_sched_adjust_cost): Likewise.
* config/tilegx/tilegx.c (tilegx_sched_adjust_cost): Likewise.
* config/tilepro/tilepro.c (tilepro_sched_adjust_cost):
* Likewise.
* config/visium/visium.c (visium_adjust_cost): Likewise.
* doc/tm.texi: Regenerate.
* haifa-sched.c (dep_cost_1): Adjust.
* target.def: Merge adjust_cost and adjust_cost_2.
2016-07-28 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* haifa-sched.c (add_to_speculative_block): Make twins a vector.

5
gcc/config/alpha/alpha.c
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@ -4758,14 +4758,15 @@ alpha_split_atomic_exchange_12 (rtx operands[])
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
static int
alpha_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
alpha_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type dep_insn_type;
/* If the dependence is an anti-dependence, there is no cost. For an
output dependence, there is sometimes a cost, but it doesn't seem
worth handling those few cases. */
if (REG_NOTE_KIND (link) != 0)
if (dep_type != 0)
return cost;
/* If we can't recognize the insns, we can't really do anything. */

2
gcc/config/arm/arm-protos.h
View File

@ -260,7 +260,7 @@ struct tune_params
{
bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool);
const struct cpu_cost_table *insn_extra_cost;
bool (*sched_adjust_cost) (rtx_insn *, rtx, rtx_insn *, int *);
bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
int (*branch_cost) (bool, bool);
/* Vectorizer costs. */
const struct cpu_vec_costs* vec_costs;

40
gcc/config/arm/arm.c
View File

@ -138,7 +138,7 @@ static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
static int arm_comp_type_attributes (const_tree, const_tree);
static void arm_set_default_type_attributes (tree);
static int arm_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int arm_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
static int arm_sched_reorder (FILE *, int, rtx_insn **, int *, int);
static int optimal_immediate_sequence (enum rtx_code code,
unsigned HOST_WIDE_INT val,
@ -257,9 +257,9 @@ static void arm_asm_trampoline_template (FILE *);
static void arm_trampoline_init (rtx, tree, rtx);
static rtx arm_trampoline_adjust_address (rtx);
static rtx arm_pic_static_addr (rtx orig, rtx reg);
static bool cortex_a9_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *);
static bool xscale_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *);
static bool fa726te_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *);
static bool cortex_a9_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
static bool xscale_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
static bool fa726te_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
static bool arm_array_mode_supported_p (machine_mode,
unsigned HOST_WIDE_INT);
static machine_mode arm_preferred_simd_mode (machine_mode);
@ -11669,11 +11669,12 @@ arm_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED,
/* Adjust cost hook for XScale. */
static bool
xscale_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost)
xscale_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep,
int * cost)
{
/* Some true dependencies can have a higher cost depending
on precisely how certain input operands are used. */
if (REG_NOTE_KIND(link) == 0
if (dep_type == 0
&& recog_memoized (insn) >= 0
&& recog_memoized (dep) >= 0)
{
@ -11730,9 +11731,10 @@ xscale_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost)
/* Adjust cost hook for Cortex A9. */
static bool
cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost)
cortex_a9_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep,
int * cost)
{
switch (REG_NOTE_KIND (link))
switch (dep_type)
{
case REG_DEP_ANTI:
*cost = 0;
@ -11772,7 +11774,7 @@ cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost
&& (attr_type_dep == TYPE_FMACS
|| attr_type_dep == TYPE_FMACD))
{
if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
if (dep_type == REG_DEP_OUTPUT)
*cost = insn_default_latency (dep) - 3;
else
*cost = insn_default_latency (dep);
@ -11780,7 +11782,7 @@ cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost
}
else
{
if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
if (dep_type == REG_DEP_OUTPUT)
*cost = insn_default_latency (dep) + 1;
else
*cost = insn_default_latency (dep);
@ -11801,11 +11803,12 @@ cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost
/* Adjust cost hook for FA726TE. */
static bool
fa726te_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost)
fa726te_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep,
int * cost)
{
/* For FA726TE, true dependency on CPSR (i.e. set cond followed by predicated)
have penalty of 3. */
if (REG_NOTE_KIND (link) == REG_DEP_TRUE
if (dep_type == REG_DEP_TRUE
&& recog_memoized (insn) >= 0
&& recog_memoized (dep) >= 0
&& get_attr_conds (dep) == CONDS_SET)
@ -12149,7 +12152,8 @@ arm_sched_reorder (FILE *file, int verbose, rtx_insn **ready, int *n_readyp,
adjust_cost function. Only put bits of code into arm_adjust_cost that
are common across all cores. */
static int
arm_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
arm_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep, int cost,
unsigned int)
{
rtx i_pat, d_pat;
@ -12157,7 +12161,7 @@ arm_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
close to a conditional branch which depends on them, so that we can
omit the comparison. */
if (TARGET_THUMB1
&& REG_NOTE_KIND (link) == 0
&& dep_type == 0
&& recog_memoized (insn) == CODE_FOR_cbranchsi4_insn
&& recog_memoized (dep) >= 0
&& get_attr_conds (dep) == CONDS_SET)
@ -12165,17 +12169,17 @@ arm_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
if (current_tune->sched_adjust_cost != NULL)
{
if (!current_tune->sched_adjust_cost (insn, link, dep, &cost))
if (!current_tune->sched_adjust_cost (insn, dep_type, dep, &cost))
return cost;
}
/* XXX Is this strictly true? */
if (REG_NOTE_KIND (link) == REG_DEP_ANTI
|| REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
if (dep_type == REG_DEP_ANTI
|| dep_type == REG_DEP_OUTPUT)
return 0;
/* Call insns don't incur a stall, even if they follow a load. */
if (REG_NOTE_KIND (link) == 0
if (dep_type == 0
&& CALL_P (insn))
return 1;

5
gcc/config/bfin/bfin.c
View File

@ -3301,13 +3301,14 @@ bfin_issue_rate (void)
}
static int
bfin_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
bfin_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type dep_insn_type;
int dep_insn_code_number;
/* Anti and output dependencies have zero cost. */
if (REG_NOTE_KIND (link) != 0)
if (dep_type != 0)
return 0;
dep_insn_code_number = recog_memoized (dep_insn);

5
gcc/config/c6x/c6x.c
View File

@ -4471,7 +4471,8 @@ c6x_variable_issue (FILE *dump ATTRIBUTE_UNUSED,
anti- and output dependencies. */
static int
c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
c6x_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type insn_type = TYPE_UNKNOWN, dep_insn_type = TYPE_UNKNOWN;
int dep_insn_code_number, insn_code_number;
@ -4486,7 +4487,7 @@ c6x_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
if (insn_code_number >= 0)
insn_type = get_attr_type (insn);
kind = REG_NOTE_KIND (link);
kind = (reg_note) dep_type;
if (kind == 0)
{
/* If we have a dependency on a load, and it's not for the result of

5
gcc/config/epiphany/epiphany.c
View File

@ -1983,9 +1983,10 @@ epiphany_issue_rate (void)
the same cost as a data-dependence. The return value should be
the new value for COST. */
static int
epiphany_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
epiphany_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost, unsigned int)
{
if (REG_NOTE_KIND (link) == 0)
if (dep_type == 0)
{
rtx dep_set;

5
gcc/config/i386/i386.c
View File

@ -28790,7 +28790,8 @@ exact_store_load_dependency (rtx_insn *store, rtx_insn *load)
}
static int
ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
ix86_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type insn_type, dep_insn_type;
enum attr_memory memory;
@ -28798,7 +28799,7 @@ ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
int dep_insn_code_number;
/* Anti and output dependencies have zero cost on all CPUs. */
if (REG_NOTE_KIND (link) != 0)
if (dep_type != 0)
return 0;
dep_insn_code_number = recog_memoized (dep_insn);

10
gcc/config/ia64/ia64.c
View File

@ -240,7 +240,7 @@ static void ia64_print_operand_address (FILE *, machine_mode, rtx);
static bool ia64_print_operand_punct_valid_p (unsigned char code);
static int ia64_issue_rate (void);
static int ia64_adjust_cost_2 (rtx_insn *, int, rtx_insn *, int, dw_t);
static int ia64_adjust_cost (rtx_insn *, int, rtx_insn *, int, dw_t);
static void ia64_sched_init (FILE *, int, int);
static void ia64_sched_init_global (FILE *, int, int);
static void ia64_sched_finish_global (FILE *, int);
@ -419,8 +419,8 @@ static const struct attribute_spec ia64_attribute_table[] =
#undef TARGET_IN_SMALL_DATA_P
#define TARGET_IN_SMALL_DATA_P ia64_in_small_data_p
#undef TARGET_SCHED_ADJUST_COST_2
#define TARGET_SCHED_ADJUST_COST_2 ia64_adjust_cost_2
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST ia64_adjust_cost
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE ia64_issue_rate
#undef TARGET_SCHED_VARIABLE_ISSUE
@ -7190,8 +7190,8 @@ ia64_single_set (rtx_insn *insn)
Return the new cost of a dependency of type DEP_TYPE or INSN on DEP_INSN.
COST is the current cost, DW is dependency weakness. */
static int
ia64_adjust_cost_2 (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
int cost, dw_t dw)
ia64_adjust_cost (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn,
int cost, dw_t dw)
{
enum reg_note dep_type = (enum reg_note) dep_type1;
enum attr_itanium_class dep_class;

7
gcc/config/m68k/m68k.c
View File

@ -138,7 +138,8 @@ struct m68k_address {
int scale;
};
static int m68k_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int m68k_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int,
unsigned int);
static int m68k_sched_issue_rate (void);
static int m68k_sched_variable_issue (FILE *, int, rtx_insn *, int);
static void m68k_sched_md_init_global (FILE *, int, int);
@ -5917,8 +5918,8 @@ static state_t sched_adjust_cost_state;
/* Implement adjust_cost scheduler hook.
Return adjusted COST of dependency LINK between DEF_INSN and INSN. */
static int
m68k_sched_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
rtx_insn *def_insn, int cost)
m68k_sched_adjust_cost (rtx_insn *insn, int, rtx_insn *def_insn, int cost,
unsigned int)
{
int delay;

10
gcc/config/microblaze/microblaze.c
View File

@ -3561,14 +3561,12 @@ microblaze_function_value (const_tree valtype,
/* Implement TARGET_SCHED_ADJUST_COST. */
static int
microblaze_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
microblaze_adjust_cost (rtx_insn *, int dep_type, rtx_insn *, int cost,
unsigned int)
{
if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
if (dep_type == REG_DEP_OUTPUT || dep_type == 0)
return cost;
if (REG_NOTE_KIND (link) != 0)
return 0;
return cost;
return 0;
}
/* Implement TARGET_LEGITIMATE_CONSTANT_P.

8
gcc/config/mips/mips.c
View File

@ -14451,13 +14451,9 @@ static struct
is treated like input-dependence. */
static int
mips_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link,
rtx_insn *dep ATTRIBUTE_UNUSED, int cost)
mips_adjust_cost (rtx_insn *, int dep_type, rtx_insn *, int cost, unsigned int)
{
if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT
&& TUNE_20KC)
return cost;
if (REG_NOTE_KIND (link) != 0)
if (dep_type != 0 && (dep_type != REG_DEP_OUTPUT || !TUNE_20KC))
return 0;
return cost;
}

5
gcc/config/mn10300/mn10300.c
View File

@ -2758,7 +2758,8 @@ set_is_store_p (rtx set)
COST is the current cycle cost for DEP. */
static int
mn10300_adjust_sched_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
mn10300_adjust_sched_cost (rtx_insn *insn, int dep_type, rtx_insn *dep,
int cost, unsigned int)
{
rtx insn_set;
rtx dep_set;
@ -2807,7 +2808,7 @@ mn10300_adjust_sched_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
return cost;
/* If a data dependence already exists then the cost is correct. */
if (REG_NOTE_KIND (link) == 0)
if (dep_type == 0)
return cost;
/* Check that the instruction about to scheduled is an FPU instruction. */

9
gcc/config/pa/pa.c
View File

@ -117,7 +117,7 @@ static bool pa_function_value_regno_p (const unsigned int);
static void pa_output_function_prologue (FILE *, HOST_WIDE_INT);
static void update_total_code_bytes (unsigned int);
static void pa_output_function_epilogue (FILE *, HOST_WIDE_INT);
static int pa_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int pa_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
static int pa_adjust_priority (rtx_insn *, int);
static int pa_issue_rate (void);
static int pa_reloc_rw_mask (void);
@ -4759,13 +4759,14 @@ pa_emit_bcond_fp (rtx operands[])
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
static int
pa_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
pa_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type attr_type;
/* Don't adjust costs for a pa8000 chip, also do not adjust any
true dependencies as they are described with bypasses now. */
if (pa_cpu >= PROCESSOR_8000 || REG_NOTE_KIND (link) == 0)
if (pa_cpu >= PROCESSOR_8000 || dep_type == 0)
return cost;
if (! recog_memoized (insn))
@ -4773,7 +4774,7 @@ pa_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
attr_type = get_attr_type (insn);
switch (REG_NOTE_KIND (link))
switch (dep_type)
{
case REG_DEP_ANTI:
/* Anti dependency; DEP_INSN reads a register that INSN writes some

16
gcc/config/rs6000/rs6000.c
View File

@ -1230,7 +1230,8 @@ static int rs6000_memory_move_cost (machine_mode, reg_class_t, bool);
static bool rs6000_debug_rtx_costs (rtx, machine_mode, int, int, int *, bool);
static int rs6000_debug_address_cost (rtx, machine_mode, addr_space_t,
bool);
static int rs6000_debug_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int rs6000_debug_adjust_cost (rtx_insn *, int, rtx_insn *, int,
unsigned int);
static bool is_microcoded_insn (rtx_insn *);
static bool is_nonpipeline_insn (rtx_insn *);
static bool is_cracked_insn (rtx_insn *);
@ -30077,14 +30078,15 @@ rs6000_variable_issue (FILE *stream, int verbose, rtx_insn *insn, int more)
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
static int
rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
rs6000_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type attr_type;
if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
return cost;
switch (REG_NOTE_KIND (link))
switch (dep_type)
{
case REG_DEP_TRUE:
{
@ -30349,16 +30351,16 @@ rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
/* Debug version of rs6000_adjust_cost. */
static int
rs6000_debug_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
int cost)
rs6000_debug_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost, unsigned int dw)
{
int ret = rs6000_adjust_cost (insn, link, dep_insn, cost);
int ret = rs6000_adjust_cost (insn, dep_type, dep_insn, cost, dw);
if (ret != cost)
{
const char *dep;
switch (REG_NOTE_KIND (link))
switch (dep_type)
{
default: dep = "unknown depencency"; break;
case REG_DEP_TRUE: dep = "data dependency"; break;

10
gcc/config/sh/sh.c
View File

@ -213,7 +213,7 @@ static void sh_output_function_epilogue (FILE *, HOST_WIDE_INT);
static void sh_insert_attributes (tree, tree *);
static const char *sh_check_pch_target_flags (int);
static int sh_register_move_cost (machine_mode, reg_class_t, reg_class_t);
static int sh_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int sh_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
static int sh_issue_rate (void);
static int sh_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *sort_p);
static short find_set_regmode_weight (rtx, machine_mode);
@ -9455,12 +9455,12 @@ sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED,
the same cost as a data-dependence. The return value should be
the new value for COST. */
static int
sh_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
rtx_insn *dep_insn, int cost)
sh_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
rtx reg, use_pat;
if (REG_NOTE_KIND (link) == 0)
if (dep_type == 0)
{
if (recog_memoized (insn) < 0
|| recog_memoized (dep_insn) < 0)
@ -9577,7 +9577,7 @@ sh_adjust_cost (rtx_insn *insn, rtx link ATTRIBUTE_UNUSED,
/* An anti-dependence penalty of two applies if the first insn is a double
precision fadd / fsub / fmul. */
else if (!TARGET_SH4_300
&& REG_NOTE_KIND (link) == REG_DEP_ANTI
&& dep_type == REG_DEP_ANTI
&& recog_memoized (dep_insn) >= 0
&& (get_attr_type (dep_insn) == TYPE_DFP_ARITH
|| get_attr_type (dep_insn) == TYPE_DFP_MUL)

23
gcc/config/sparc/sparc.c
View File

@ -545,8 +545,8 @@ static void sparc_init_modes (void);
static int function_arg_slotno (const CUMULATIVE_ARGS *, machine_mode,
const_tree, bool, bool, int *, int *);
static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int hypersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int supersparc_adjust_cost (rtx_insn *, int, rtx_insn *, int);
static int hypersparc_adjust_cost (rtx_insn *, int, rtx_insn *, int);
static void sparc_emit_set_const32 (rtx, rtx);
static void sparc_emit_set_const64 (rtx, rtx);
@ -565,7 +565,7 @@ static void sparc_asm_function_epilogue (FILE *, HOST_WIDE_INT);
static void sparc_solaris_elf_asm_named_section (const char *, unsigned int,
tree) ATTRIBUTE_UNUSED;
#endif
static int sparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int sparc_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
static int sparc_issue_rate (void);
static void sparc_sched_init (FILE *, int, int);
static int sparc_use_sched_lookahead (void);
@ -9353,7 +9353,8 @@ sparc_trampoline_init (rtx m_tramp, tree fndecl, rtx cxt)
a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
static int
supersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
supersparc_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost)
{
enum attr_type insn_type;
@ -9362,7 +9363,7 @@ supersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
insn_type = get_attr_type (insn);
if (REG_NOTE_KIND (link) == 0)
if (dep_type == 0)
{
/* Data dependency; DEP_INSN writes a register that INSN reads some
cycles later. */
@ -9414,7 +9415,8 @@ supersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
}
static int
hypersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
hypersparc_adjust_cost (rtx_insn *insn, int dtype, rtx_insn *dep_insn,
int cost)
{
enum attr_type insn_type, dep_type;
rtx pat = PATTERN(insn);
@ -9426,7 +9428,7 @@ hypersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
insn_type = get_attr_type (insn);
dep_type = get_attr_type (dep_insn);
switch (REG_NOTE_KIND (link))
switch (dtype)
{
case 0:
/* Data dependency; DEP_INSN writes a register that INSN reads some
@ -9491,16 +9493,17 @@ hypersparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
}
static int
sparc_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int cost)
sparc_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep, int cost,
unsigned int)
{
switch (sparc_cpu)
{
case PROCESSOR_SUPERSPARC:
cost = supersparc_adjust_cost (insn, link, dep, cost);
cost = supersparc_adjust_cost (insn, dep_type, dep, cost);
break;
case PROCESSOR_HYPERSPARC:
case PROCESSOR_SPARCLITE86X:
cost = hypersparc_adjust_cost (insn, link, dep, cost);
cost = hypersparc_adjust_cost (insn, dep_type, dep, cost);
break;
default:
break;

5
gcc/config/spu/spu.c
View File

@ -2983,7 +2983,8 @@ spu_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
/* INSN is dependent on DEP_INSN. */
static int
spu_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
spu_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost, unsigned int)
{
rtx set;
@ -3044,7 +3045,7 @@ spu_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
scheduler makes every insn in a block anti-dependent on the final
jump_insn. We adjust here so higher cost insns will get scheduled
earlier. */
if (JUMP_P (insn) && REG_NOTE_KIND (link) == REG_DEP_ANTI)
if (JUMP_P (insn) && dep_type == REG_DEP_ANTI)
return insn_cost (dep_insn) - 3;
return cost;

6
gcc/config/tilegx/tilegx.c
View File

@ -4419,15 +4419,15 @@ get_jump_target (rtx branch)
/* Implement TARGET_SCHED_ADJUST_COST. */
static int
tilegx_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
int cost)
tilegx_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost, unsigned int)
{
/* If we have a true dependence, INSN is a call, and DEP_INSN
defines a register that is needed by the call (argument or stack
pointer) , set its latency to 0 so that it can be bundled with
the call. Explicitly check for and exclude the case when
DEP_INSN defines the target of the jump. */
if (CALL_P (insn) && REG_NOTE_KIND (link) == REG_DEP_TRUE)
if (CALL_P (insn) && dep_type == REG_DEP_TRUE)
{
rtx target = get_jump_target (insn);
if (!REG_P (target) || !set_of (target, dep_insn))

6
gcc/config/tilepro/tilepro.c
View File

@ -3944,15 +3944,15 @@ get_jump_target (rtx branch)
/* Implement TARGET_SCHED_ADJUST_COST. */
static int
tilepro_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn,
int cost)
tilepro_sched_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn,
int cost, unsigned int)
{
/* If we have a true dependence, INSN is a call, and DEP_INSN
defines a register that is needed by the call (argument or stack
pointer), set its latency to 0 so that it can be bundled with
the call. Explicitly check for and exclude the case when
DEP_INSN defines the target of the jump. */
if (CALL_P (insn) && REG_NOTE_KIND (link) == REG_DEP_TRUE)
if (CALL_P (insn) && dep_type == REG_DEP_TRUE)
{
rtx target = get_jump_target (insn);
if (!REG_P (target) || !set_of (target, dep_insn))

11
gcc/config/visium/visium.c
View File

@ -211,7 +211,7 @@ static int visium_issue_rate (void);
static int visium_adjust_priority (rtx_insn *, int);
static int visium_adjust_cost (rtx_insn *, rtx, rtx_insn *, int);
static int visium_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
static int visium_register_move_cost (enum machine_mode, reg_class_t,
reg_class_t);
@ -528,14 +528,15 @@ visium_adjust_priority (rtx_insn *insn, int priority)
a dependency LINK of INSN on DEP_INSN. COST is the current cost. */
static int
visium_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
visium_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
unsigned int)
{
enum attr_type attr_type;
/* Don't adjust costs for true dependencies as they are described with
bypasses. But we make an exception for the first scheduling pass to
help the subsequent postreload compare elimination pass. */
if (REG_NOTE_KIND (link) == REG_DEP_TRUE)
if (dep_type == REG_DEP_TRUE)
{
if (!reload_completed
&& recog_memoized (insn) >= 0
@ -576,7 +577,7 @@ visium_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
/* Anti dependency: DEP_INSN reads a register that INSN writes some
cycles later. */
if (REG_NOTE_KIND (link) == REG_DEP_ANTI)
if (dep_type == REG_DEP_ANTI)
{
/* On the GR5, the latency of FP instructions needs to be taken into
account for every dependency involving a write. */
@ -637,7 +638,7 @@ visium_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
/* Output dependency: DEP_INSN writes a register that INSN writes some
cycles later. */
else if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
else if (dep_type == REG_DEP_OUTPUT)
{
/* On the GR5, the latency of FP instructions needs to be taken into
account for every dependency involving a write. */

14
gcc/doc/tm.texi
View File

@ -6590,14 +6590,14 @@ debug output to. @var{verbose} is the verbose level provided by
was scheduled.
@end deftypefn
@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx_insn *@var{insn}, rtx @var{link}, rtx_insn *@var{dep_insn}, int @var{cost})
@deftypefn {Target Hook} int TARGET_SCHED_ADJUST_COST (rtx_insn *@var{insn}, int @var{dep_type1}, rtx_insn *@var{dep_insn}, int @var{cost}, unsigned int @var{dw})
This function corrects the value of @var{cost} based on the
relationship between @var{insn} and @var{dep_insn} through the
dependence @var{link}. It should return the new value. The default
is to make no adjustment to @var{cost}. This can be used for example
to specify to the scheduler using the traditional pipeline description
that an output- or anti-dependence does not incur the same cost as a
data-dependence. If the scheduler using the automaton based pipeline
relationship between @var{insn} and @var{dep_insn} through a
dependence of type dep_type, and strength @var{dw}. It should return the new
value. The default is to make no adjustment to @var{cost}. This can be
used for example to specify to the scheduler using the traditional pipeline
description that an output- or anti-dependence does not incur the same cost
as a data-dependence. If the scheduler using the automaton based pipeline
description, the cost of anti-dependence is zero and the cost of
output-dependence is maximum of one and the difference of latency
times of the first and the second insns. If these values are not

25
gcc/haifa-sched.c
View File

@ -1483,28 +1483,9 @@ dep_cost_1 (dep_t link, dw_t dw)
}
if (targetm.sched.adjust_cost_2)
cost = targetm.sched.adjust_cost_2 (used, (int) dep_type, insn, cost,
dw);
else if (targetm.sched.adjust_cost != NULL)
{
/* This variable is used for backward compatibility with the
targets. */
rtx_insn_list *dep_cost_rtx_link =
alloc_INSN_LIST (NULL_RTX, NULL);
/* Make it self-cycled, so that if some tries to walk over this
incomplete list he/she will be caught in an endless loop. */
XEXP (dep_cost_rtx_link, 1) = dep_cost_rtx_link;
/* Targets use only REG_NOTE_KIND of the link. */
PUT_REG_NOTE_KIND (dep_cost_rtx_link, DEP_TYPE (link));
cost = targetm.sched.adjust_cost (used, dep_cost_rtx_link,
insn, cost);
free_INSN_LIST_node (dep_cost_rtx_link);
}
if (targetm.sched.adjust_cost)
cost = targetm.sched.adjust_cost (used, (int) dep_type, insn, cost,
dw);
if (cost < 0)
cost = 0;

25
gcc/target.def
View File

@ -932,18 +932,20 @@ HOOK_VECTOR (TARGET_SCHED, sched)
DEFHOOK
(adjust_cost,
"This function corrects the value of @var{cost} based on the\n\
relationship between @var{insn} and @var{dep_insn} through the\n\
dependence @var{link}. It should return the new value. The default\n\
is to make no adjustment to @var{cost}. This can be used for example\n\
to specify to the scheduler using the traditional pipeline description\n\
that an output- or anti-dependence does not incur the same cost as a\n\
data-dependence. If the scheduler using the automaton based pipeline\n\
relationship between @var{insn} and @var{dep_insn} through a\n\
dependence of type dep_type, and strength @var{dw}. It should return the new\n\
value. The default is to make no adjustment to @var{cost}. This can be\n\
used for example to specify to the scheduler using the traditional pipeline\n\
description that an output- or anti-dependence does not incur the same cost\n\
as a data-dependence. If the scheduler using the automaton based pipeline\n\
description, the cost of anti-dependence is zero and the cost of\n\
output-dependence is maximum of one and the difference of latency\n\
times of the first and the second insns. If these values are not\n\
acceptable, you could use the hook to modify them too. See also\n\
@pxref{Processor pipeline description}.",
int, (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost), NULL)
int, (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn, int cost,
unsigned int dw),
NULL)
/* Adjust the priority of an insn as you see fit. Returns the new priority. */
DEFHOOK
@ -1346,15 +1348,6 @@ closer to one another---i.e., closer than the dependence distance; however,\n\
not in cases of ``costly dependences'', which this hooks allows to define.",
bool, (struct _dep *_dep, int cost, int distance), NULL)
DEFHOOK_UNDOC
(adjust_cost_2,
"Given the current cost, @var{cost}, of an insn, @var{insn}, calculate and\
return a new cost based on its relationship to @var{dep_insn} through the\
dependence of weakness @var{dw}. The default is to make no adjustment.",
int, (rtx_insn *insn, int dep_type1, rtx_insn *dep_insn, int cost,
unsigned int dw),
NULL)
/* The following member value is a pointer to a function called
by the insn scheduler. This hook is called to notify the backend
that new instructions were emitted. */