diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2c8eb9e930d..77e029e1414 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2012-06-19 Joseph Myers + + * config/rs6000/spe.md (*mov_si_e500_subreg0): Rename to + mov_si_e500_subreg0. + (*mov_si_e500_subreg0_elf_low) + (*mov_si_e500_subreg4_elf_low): New patterns. + 2012-06-19 Richard Henderson * config/alpha/alpha.c: Include params.h. diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index bbe11b9124b..43cdbfa92f2 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -1,5 +1,5 @@ ;; e500 SPE description -;; Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 +;; Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2011, 2012 ;; Free Software Foundation, Inc. ;; Contributed by Aldy Hernandez (aldy@quesejoda.com) @@ -2329,7 +2329,7 @@ "evmergehi %0,%1,%1\;mr %L0,%1\;evmergehi %Y0,%L1,%L1\;mr %Z0,%L1" [(set_attr "length" "16")]) -(define_insn "*mov_si_e500_subreg0" +(define_insn "mov_si_e500_subreg0" [(set (subreg:SI (match_operand:SPE64TF 0 "register_operand" "+r,&r") 0) (match_operand:SI 1 "input_operand" "r,m"))] "(TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode)) @@ -2339,6 +2339,24 @@ evmergelohi %0,%0,%0\;{l%U1%X1|lwz%U1%X1} %0,%1\;evmergelohi %0,%0,%0" [(set_attr "length" "4,12")]) +(define_insn_and_split "*mov_si_e500_subreg0_elf_low" + [(set (subreg:SI (match_operand:SPE64TF 0 "register_operand" "+r") 0) + (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "r") + (match_operand 2 "" "")))] + "((TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode)) + || (TARGET_SPE && mode != DFmode && mode != TFmode)) + && TARGET_ELF && !TARGET_64BIT && can_create_pseudo_p ()" + "#" + "&& 1" + [(pc)] +{ + rtx tmp = gen_reg_rtx (SImode); + emit_insn (gen_elf_low (tmp, operands[1], operands[2])); + emit_insn (gen_mov_si_e500_subreg0 (operands[0], tmp)); + DONE; +} + [(set_attr "length" "8")]) + ;; ??? Could use evstwwe for memory stores in some cases, depending on ;; the offset. (define_insn "*mov_si_e500_subreg0_2" @@ -2360,6 +2378,15 @@ mr %0,%1 {l%U1%X1|lwz%U1%X1} %0,%1") +(define_insn "*mov_si_e500_subreg4_elf_low" + [(set (subreg:SI (match_operand:SPE64TF 0 "register_operand" "+r") 4) + (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "r") + (match_operand 2 "" "")))] + "((TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode)) + || (TARGET_SPE && mode != DFmode && mode != TFmode)) + && TARGET_ELF && !TARGET_64BIT" + "{ai|addic} %0,%1,%K2") + (define_insn "*mov_si_e500_subreg4_2" [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "+r,m") (subreg:SI (match_operand:SPE64TF 1 "register_operand" "r,r") 4))] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index de7b7d54db7..c82c0ab1a00 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-06-19 Joseph Myers + + * gcc.c-torture/compile/vector-5.c, + gcc.c-torture/compile/vector-6.c: New tests. + 2012-06-19 Richard Henderson * gcc.target/i386/pr33329.c: Change multiplier constant to 12345. diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-5.c b/gcc/testsuite/gcc.c-torture/compile/vector-5.c new file mode 100644 index 00000000000..30a4f859402 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/vector-5.c @@ -0,0 +1,7 @@ +typedef int v2si __attribute__((__vector_size__(8))); + +v2si +f (int x) +{ + return (v2si) { x, (__INTPTR_TYPE__) "" }; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-6.c b/gcc/testsuite/gcc.c-torture/compile/vector-6.c new file mode 100644 index 00000000000..7694d366327 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/vector-6.c @@ -0,0 +1,7 @@ +typedef int v2si __attribute__((__vector_size__(8))); + +v2si +f (int x) +{ + return (v2si) { (__INTPTR_TYPE__) "", x }; +}