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re PR target/36992 (Very stange code for _mm_move_epi64)

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gcc/

2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/36992
	* config/i386/emmintrin.h (_mm_move_epi64): Use
	__builtin_ia32_movq128.

	* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128.
	(bdesc_args): Add IX86_BUILTIN_MOVQ128.

	* config/i386/sse.md (sse2_movq128): New.

	* doc/extend.texi: Document __builtin_ia32_movq128.

gcc/testsuite/

2008-08-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/36992
	* gcc.target/i386/pr36992-1.c: Scan movq.
	* gcc.target/i386/pr36992-2.c: Use "-O2 -msse4" instead of
	"-O0 -msse2".  Scan movq.

From-SVN: r138839
This commit is contained in:
H.J. Lu 2008-08-07 06:16:23 -07:00
parent 9aa4d3c1cb
commit b53b23dcfd
8 changed files with 46 additions and 9 deletions
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13
gcc/ChangeLog
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@ -1,3 +1,16 @@
2008-08-07 H.J. Lu <hongjiu.lu@intel.com>
PR target/36992
* config/i386/emmintrin.h (_mm_move_epi64): Use
__builtin_ia32_movq128.
* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128.
(bdesc_args): Add IX86_BUILTIN_MOVQ128.
* config/i386/sse.md (sse2_movq128): New.
* doc/extend.texi: Document __builtin_ia32_movq128.
2008-08-07 Richard Guenther <rguenther@suse.de>
PR middle-end/37042

2
gcc/config/i386/emmintrin.h
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@ -726,7 +726,7 @@ _mm_movpi64_epi64 (__m64 __A)
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_move_epi64 (__m128i __A)
{
return _mm_set_epi64 ((__m64)0LL, _mm_movepi64_pi64 (__A));
return (__m128i)__builtin_ia32_movq128 ((__v2di) __A);
}
/* Create a vector of zeros. */

4
gcc/config/i386/i386.c
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@ -18729,6 +18729,8 @@ enum ix86_builtins
IX86_BUILTIN_MOVNTPD,
IX86_BUILTIN_MOVNTDQ,
IX86_BUILTIN_MOVQ128,
/* SSE2 MMX */
IX86_BUILTIN_MASKMOVDQU,
IX86_BUILTIN_MOVMSKPD,
@ -19858,6 +19860,8 @@ static const struct builtin_description bdesc_args[] =
{ OPTION_MASK_ISA_SSE2, CODE_FOR_abstf2, 0, IX86_BUILTIN_FABSQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128 },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_copysigntf3, 0, IX86_BUILTIN_COPYSIGNQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128_FLOAT128 },
{ OPTION_MASK_ISA_SSE, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI },
/* SSE2 MMX */
{ OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI },
{ OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_subv1di3, "__builtin_ia32_psubq", IX86_BUILTIN_PSUBQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI },

12
gcc/config/i386/sse.md
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@ -210,6 +210,18 @@
DONE;
})
(define_insn "sse2_movq128"
[(set (match_operand:V2DI 0 "register_operand" "=x")
(vec_concat:V2DI
(vec_select:DI
(match_operand:V2DI 1 "nonimmediate_operand" "xm")
(parallel [(const_int 0)]))
(const_int 0)))]
"TARGET_SSE2"
"movq\t{%1, %0|%0, %1}"
[(set_attr "type" "ssemov")
(set_attr "mode" "TI")])
(define_insn "<sse>_movup<ssemodesuffixf2c>"
[(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m")
(unspec:SSEMODEF2P

1
gcc/doc/extend.texi
View File

@ -8071,6 +8071,7 @@ v2di __builtin_ia32_psrlqi128 (v2di, int)
v8hi __builtin_ia32_psrawi128 (v8hi, int)
v4si __builtin_ia32_psradi128 (v4si, int)
v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi)
v2di __builtin_ia32_movq128 (v2di)
@end smallexample
The following built-in functions are available when @option{-msse3} is used.

17
gcc/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2008-08-07 H.J. Lu <hongjiu.lu@intel.com>
PR target/36992
* gcc.target/i386/pr36992-1.c: Scan movq.
* gcc.target/i386/pr36992-2.c: Use "-O2 -msse4" instead of
"-O0 -msse2". Scan movq.
2008-08-07 Richard Guenther <rguenther@suse.de>
PR middle-end/37042
@ -5,15 +12,15 @@
2008-08-07 Andreas Krebbel <krebbel1@de.ibm.com>
* gcc.c-torture/compile/20080806-1.c: Move testcase ...
* gcc.c-torture/compile/20080806-1.c: Move testcase ...
* gcc.target/s390/20080806-1.c: ... to here.
2008-08-06 Douglas Gregor <doug.gregor@gmail.com>
PR c++/36460
* g++.dg/cpp0x/bracket3.C: Add another test case for the >>
warning under -Wc++0x-compat.
* g++.dg/cpp0x/bracket4.C: Add testcase for PR c++/36460.
PR c++/36460
* g++.dg/cpp0x/bracket3.C: Add another test case for the >>
warning under -Wc++0x-compat.
* g++.dg/cpp0x/bracket4.C: Add testcase for PR c++/36460.
2008-08-06 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>

2
gcc/testsuite/gcc.target/i386/pr36992-1.c
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@ -9,4 +9,4 @@ test (__m128i b)
return _mm_move_epi64 (b);
}
/* { dg-final { scan-assembler-times "mov\[qd\]\[ \\t\]+.*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */

4
gcc/testsuite/gcc.target/i386/pr36992-2.c
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@ -1,5 +1,5 @@
/* { dg-do compile }
/* { dg-options "-O0 -msse2" } */
/* { dg-options "-O2 -msse4" } */
#include <emmintrin.h>
@ -9,4 +9,4 @@ test (__m128i b)
return _mm_move_epi64 (b);
}
/* { dg-final { scan-assembler-not "%mm" } } */
/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */