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aarch64.h (CANNOT_CHANGE_MODE_CLASS): Removed. 

gcc/
2015-01-21  David Sherwood  <david.sherwood@arm.com>
	    Tejas Belagod <Tejas.Belagod@arm.com>

	* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Removed.
	* config/aarch64/aarch64.c (aarch64_cannot_change_mode_class): Removed.
	* config/aarch64/aarch64-protos.h (aarch64_cannot_change_mode_class):
	Removed.

Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>

From-SVN: r219960
This commit is contained in:
David Sherwood 2015-01-21 17:53:55 +00:00 committed by Richard Sandiford
parent 668046d175
commit b6b782b967
4 changed files with 8 additions and 54 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2015-01-21 David Sherwood <david.sherwood@arm.com>
Tejas Belagod <Tejas.Belagod@arm.com>
* config/aarch64/aarch64.h (CANNOT_CHANGE_MODE_CLASS): Removed.
* config/aarch64/aarch64.c (aarch64_cannot_change_mode_class): Removed.
* config/aarch64/aarch64-protos.h (aarch64_cannot_change_mode_class):
Removed.
2015-01-21 David Sherwood <david.sherwood@arm.com>
Tejas Belagod <Tejas.Belagod@arm.com>

3
gcc/config/aarch64/aarch64-protos.h
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@ -182,9 +182,6 @@ struct tune_params
HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
int aarch64_get_condition_code (rtx);
bool aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode);
bool aarch64_cannot_change_mode_class (machine_mode,
machine_mode,
enum reg_class);
enum aarch64_symbol_type
aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context);
bool aarch64_const_vec_all_same_int_p (rtx, HOST_WIDE_INT);

48
gcc/config/aarch64/aarch64.c
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@ -10175,54 +10175,6 @@ aarch64_vectorize_vec_perm_const_ok (machine_mode vmode,
return ret;
}
/* Implement target hook CANNOT_CHANGE_MODE_CLASS. */
bool
aarch64_cannot_change_mode_class (machine_mode from,
machine_mode to,
enum reg_class rclass)
{
/* Full-reg subregs are allowed on general regs or any class if they are
the same size. */
if (GET_MODE_SIZE (from) == GET_MODE_SIZE (to)
|| !reg_classes_intersect_p (FP_REGS, rclass))
return false;
/* Limited combinations of subregs are safe on FPREGs. Particularly,
1. Vector Mode to Scalar mode where 1 unit of the vector is accessed.
2. Scalar to Scalar for integer modes or same size float modes.
3. Vector to Vector modes.
4. On little-endian only, Vector-Structure to Vector modes. */
if (GET_MODE_SIZE (from) > GET_MODE_SIZE (to))
{
if (aarch64_vector_mode_supported_p (from)
&& GET_MODE_SIZE (GET_MODE_INNER (from)) == GET_MODE_SIZE (to))
return false;
if (GET_MODE_NUNITS (from) == 1
&& GET_MODE_NUNITS (to) == 1
&& (GET_MODE_CLASS (from) == MODE_INT
|| from == to))
return false;
if (aarch64_vector_mode_supported_p (from)
&& aarch64_vector_mode_supported_p (to))
return false;
/* Within an vector structure straddling multiple vector registers
we are in a mixed-endian representation. As such, we can't
easily change modes for BYTES_BIG_ENDIAN. Otherwise, we can
switch between vectors and vector structures cheaply. */
if (!BYTES_BIG_ENDIAN)
if ((aarch64_vector_mode_supported_p (from)
&& aarch64_vect_struct_mode_p (to))
|| (aarch64_vector_mode_supported_p (to)
&& aarch64_vect_struct_mode_p (from)))
return false;
}
return true;
}
rtx
aarch64_reverse_mask (enum machine_mode mode)
{

3
gcc/config/aarch64/aarch64.h
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@ -879,9 +879,6 @@ do { \
extern void __aarch64_sync_cache_range (void *, void *); \
__aarch64_sync_cache_range (beg, end)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
aarch64_cannot_change_mode_class (FROM, TO, CLASS)
#define SHIFT_COUNT_TRUNCATED !TARGET_SIMD
/* Choose appropriate mode for caller saves, so we do the minimum