i386.md (prefetch): Allow TARGET_AVX512PF.
* config/i386/i386.md (prefetch): Allow TARGET_AVX512PF. (*prefetch_avx512pf_<mode>): New. * config/i386/sse.md (avx512f_vmcmp<mode>3): Ditto. (avx512f_maskcmp<mode>3): Ditto. (vashrv16si3): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r204130
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@ -1,3 +1,19 @@
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2013-10-28 Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* config/i386/i386.md (prefetch): Allow TARGET_AVX512PF.
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(*prefetch_avx512pf_<mode>): New.
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* config/i386/sse.md (avx512f_vmcmp<mode>3): Ditto.
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(avx512f_maskcmp<mode>3): Ditto.
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(vashrv16si3): Ditto.
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2013-10-28 Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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@ -17627,7 +17627,7 @@
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[(prefetch (match_operand 0 "address_operand")
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(match_operand:SI 1 "const_int_operand")
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(match_operand:SI 2 "const_int_operand"))]
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"TARGET_PREFETCH_SSE || TARGET_PRFCHW"
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"TARGET_PREFETCH_SSE || TARGET_PRFCHW || TARGET_AVX512PF"
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{
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bool write = INTVAL (operands[1]) != 0;
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int locality = INTVAL (operands[2]);
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@ -17638,7 +17638,9 @@
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supported by SSE counterpart or the SSE prefetch is not available
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(K6 machines). Otherwise use SSE prefetch as it allows specifying
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of locality. */
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if (TARGET_PRFCHW && (write || !TARGET_PREFETCH_SSE))
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if (TARGET_AVX512PF && write)
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operands[2] = const1_rtx;
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else if (TARGET_PRFCHW && (write || !TARGET_PREFETCH_SSE))
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operands[2] = GEN_INT (3);
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else
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operands[1] = const0_rtx;
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@ -17681,6 +17683,18 @@
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(symbol_ref "memory_address_length (operands[0], false)"))
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(set_attr "memory" "none")])
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(define_insn "*prefetch_avx512pf_<mode>"
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[(prefetch (match_operand:P 0 "address_operand" "p")
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(const_int 1)
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(const_int 1))]
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"TARGET_AVX512PF"
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"prefetchwt1\t%a0";
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[(set_attr "type" "sse")
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(set_attr "prefix" "evex")
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(set (attr "length_address")
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(symbol_ref "memory_address_length (operands[0], false)"))
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(set_attr "memory" "none")])
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(define_expand "stack_protect_set"
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[(match_operand 0 "memory_operand")
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(match_operand 1 "memory_operand")]
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@ -2010,6 +2010,34 @@
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "avx512f_vmcmp<mode>3"
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[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
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(and:<avx512fmaskmode>
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(unspec:<avx512fmaskmode>
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[(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")
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(match_operand:SI 3 "const_0_to_31_operand" "n")]
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UNSPEC_PCMP)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vcmp<ssescalarmodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "ssecmp")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<ssescalarmode>")])
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(define_insn "avx512f_maskcmp<mode>3"
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[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
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(match_operator:<avx512fmaskmode> 3 "sse_comparison_operator"
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[(match_operand:VF 1 "register_operand" "v")
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(match_operand:VF 2 "nonimmediate_operand" "vm")]))]
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"TARGET_SSE"
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"vcmp%D3<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "ssecmp")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "<sse>_comi"
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[(set (reg:CCFP FLAGS_REG)
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(compare:CCFP
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@ -12148,6 +12176,12 @@
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}
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})
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(define_expand "vashrv16si3"
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[(set (match_operand:V16SI 0 "register_operand")
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(ashiftrt:V16SI (match_operand:V16SI 1 "register_operand")
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(match_operand:V16SI 2 "nonimmediate_operand")))]
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"TARGET_AVX512F")
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(define_expand "vashrv8si3"
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[(set (match_operand:V8SI 0 "register_operand")
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(ashiftrt:V8SI (match_operand:V8SI 1 "register_operand")
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