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i386.md (operations with memory inputs setting flags peephole2): Remove uneeded REG_P checks.

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* config/i386/i386.md
	(operations with memory inputs setting flags peephole2):
	Remove uneeded REG_P checks.  Cleanup pattern generation.

From-SVN: r235641
This commit is contained in:
Uros Bizjak 2016-04-29 16:31:56 +02:00
parent 9129c8cfcd
commit b891ade601
2 changed files with 48 additions and 38 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,9 @@
2016-04-29 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md
(operations with memory inputs setting flags peephole2):
Remove uneeded REG_P checks. Cleanup pattern generation.
2016-04-29 Ilya Enkovich <ilya.enkovich@intel.com> 2016-04-29 Ilya Enkovich <ilya.enkovich@intel.com>
* tree-vect-loop.c (vect_transform_loop): Fix * tree-vect-loop.c (vect_transform_loop): Fix
@ -12,9 +18,8 @@
2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com> 2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.md (*loadqi_update): Replace use of 'rI' * config/arc/arc.md (*loadqi_update): Replace use of 'rI' constraint
constraint with 'rCm2' constraints to limit possible immediate with 'rCm2' constraints to limit possible immediate size.
size.
(*load_zeroextendqisi_update): Likewise. (*load_zeroextendqisi_update): Likewise.
(*load_signextendqisi_update): Likewise. (*load_signextendqisi_update): Likewise.
(*loadhi_update): Likewise. (*loadhi_update): Likewise.

75
gcc/config/i386/i386.md
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@ -18006,16 +18006,18 @@
(GET_CODE (operands[3]) == PLUS (GET_CODE (operands[3]) == PLUS
|| GET_CODE (operands[3]) == MINUS) || GET_CODE (operands[3]) == MINUS)
? CCGOCmode : CCNOmode)" ? CCGOCmode : CCNOmode)"
[(parallel [(set (match_dup 4) (match_dup 5)) [(parallel [(set (match_dup 4) (match_dup 6))
(set (match_dup 1) (match_op_dup 3 [(match_dup 1) (set (match_dup 1) (match_dup 5))])]
(match_dup 2)]))])]
{ {
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3))); operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode, operands[5]
copy_rtx (operands[1]), = gen_rtx_fmt_ee (GET_CODE (operands[3]), GET_MODE (operands[3]),
copy_rtx (operands[2])); copy_rtx (operands[1]),
operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), operands[2]);
operands[5], const0_rtx); operands[6]
= gen_rtx_COMPARE (GET_MODE (operands[4]),
copy_rtx (operands[5]),
const0_rtx);
}) })
;; Likewise for instances where we have a lea pattern. ;; Likewise for instances where we have a lea pattern.
@ -18038,16 +18040,18 @@
|| immediate_operand (operands[2], QImode) || immediate_operand (operands[2], QImode)
|| any_QIreg_operand (operands[2], QImode)) || any_QIreg_operand (operands[2], QImode))
&& ix86_match_ccmode (peep2_next_insn (3), CCGOCmode)" && ix86_match_ccmode (peep2_next_insn (3), CCGOCmode)"
[(parallel [(set (match_dup 4) (match_dup 5)) [(parallel [(set (match_dup 4) (match_dup 6))
(set (match_dup 1) (plus:SWI (match_dup 1) (set (match_dup 1) (match_dup 5))])]
(match_dup 2)))])]
{ {
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3))); operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
operands[5] = gen_rtx_PLUS (<MODE>mode, operands[5]
copy_rtx (operands[1]), = gen_rtx_PLUS (<MODE>mode,
copy_rtx (operands[2])); copy_rtx (operands[1]),
operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), operands[2]);
operands[5], const0_rtx); operands[6]
= gen_rtx_COMPARE (GET_MODE (operands[4]),
copy_rtx (operands[5]),
const0_rtx);
}) })
(define_peephole2 (define_peephole2
@ -18065,16 +18069,18 @@
&& ix86_match_ccmode (peep2_next_insn (2), && ix86_match_ccmode (peep2_next_insn (2),
GET_CODE (operands[2]) == PLUS GET_CODE (operands[2]) == PLUS
? CCGOCmode : CCNOmode)" ? CCGOCmode : CCNOmode)"
[(parallel [(set (match_dup 3) (match_dup 4)) [(parallel [(set (match_dup 3) (match_dup 5))
(set (match_dup 1) (match_op_dup 2 [(match_dup 1) (set (match_dup 1) (match_dup 4))])]
(match_dup 0)]))])]
{ {
operands[3] = SET_DEST (PATTERN (peep2_next_insn (2))); operands[3] = SET_DEST (PATTERN (peep2_next_insn (2)));
operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[2]), <MODE>mode, operands[4]
copy_rtx (operands[1]), = gen_rtx_fmt_ee (GET_CODE (operands[2]), GET_MODE (operands[2]),
copy_rtx (operands[0])); copy_rtx (operands[1]),
operands[4] = gen_rtx_COMPARE (GET_MODE (operands[3]), operands[0]);
operands[4], const0_rtx); operands[5]
= gen_rtx_COMPARE (GET_MODE (operands[3]),
copy_rtx (operands[4]),
const0_rtx);
}) })
(define_peephole2 (define_peephole2
@ -18088,7 +18094,6 @@
(set (match_dup 1) (match_dup 0)) (set (match_dup 1) (match_dup 0))
(set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))] (set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))]
"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
&& REG_P (operands[0]) && REG_P (operands[4])
&& REGNO (operands[0]) == REGNO (operands[4]) && REGNO (operands[0]) == REGNO (operands[4])
&& peep2_reg_dead_p (4, operands[0]) && peep2_reg_dead_p (4, operands[0])
&& (<MODE>mode != QImode && (<MODE>mode != QImode
@ -18100,18 +18105,18 @@
(GET_CODE (operands[3]) == PLUS (GET_CODE (operands[3]) == PLUS
|| GET_CODE (operands[3]) == MINUS) || GET_CODE (operands[3]) == MINUS)
? CCGOCmode : CCNOmode)" ? CCGOCmode : CCNOmode)"
[(parallel [(set (match_dup 4) (match_dup 5)) [(parallel [(set (match_dup 4) (match_dup 6))
(set (match_dup 1) (match_dup 6))])] (set (match_dup 1) (match_dup 5))])]
{ {
operands[2] = gen_lowpart (<MODE>mode, operands[2]);
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3))); operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode, operands[5]
copy_rtx (operands[1]), operands[2]); = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), copy_rtx (operands[1]),
operands[5], const0_rtx); gen_lowpart (<MODE>mode, operands[2]));
operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode, operands[6]
copy_rtx (operands[1]), = gen_rtx_COMPARE (GET_MODE (operands[4]),
copy_rtx (operands[2])); copy_rtx (operands[5]),
const0_rtx);
}) })
;; Attempt to always use XOR for zeroing registers (including FP modes). ;; Attempt to always use XOR for zeroing registers (including FP modes).