m68hc11.md (SOFT_TMP_REGNUM): Define.
* config/m68hc11/m68hc11.md (SOFT_TMP_REGNUM): Define. (SOFT_XY_REGNUM): Define. (cmp split): Use the above instead of hard coded numbers. (8-bit op split): No need to check the mode; allow Q_REG. (ashift split): Adjust the first operand if it uses the SP and we are pushing the shifted value. (plus shift split): Fix when a source is in register D+X. ("doloop_end"): Pass dummy arguments to gen_rtx_NE. From-SVN: r78781
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@ -1,3 +1,14 @@
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2004-03-02 Stephane Carrez <stcarrez@nerim.fr>
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* config/m68hc11/m68hc11.md (SOFT_TMP_REGNUM): Define.
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(SOFT_XY_REGNUM): Define.
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(cmp split): Use the above instead of hard coded numbers.
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(8-bit op split): No need to check the mode; allow Q_REG.
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(ashift split): Adjust the first operand if it uses the SP and we
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are pushing the shifted value.
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(plus shift split): Fix when a source is in register D+X.
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("doloop_end"): Pass dummy arguments to gen_rtx_NE.
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2004-03-02 Stephane Carrez <stcarrez@nerim.fr>
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* config/m68hc11/m68hc11.c (m68hc11_check_z_replacement): Fix when
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@ -144,7 +144,9 @@
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(A_REGNUM 5) ; A (high part of D)
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(B_REGNUM 6) ; B (low part of D)
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(CC_REGNUM 7) ; Condition code register
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(SOFT_TMP_REGNUM 10) ; TMP soft register
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(SOFT_Z_REGNUM 11) ; Z soft register
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(SOFT_XY_REGNUM 12) ; XY soft register
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])
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;;--------------------------------------------------------------------
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@ -252,7 +254,7 @@
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[(set (cc0)
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(match_operand:QI 0 "tst_operand" "m"))
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(use (match_operand:HI 1 "hard_reg_operand" "dxy"))
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(use (reg:HI 11))]
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(use (reg:HI SOFT_Z_REGNUM))]
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""
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"#")
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@ -937,9 +939,9 @@
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(define_split
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[(set (match_operand:QI 0 "hard_addr_reg_operand" "")
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(match_operand:QI 1 "general_operand" ""))]
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"z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode
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"z_replacement_completed == 2
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&& !reg_mentioned_p (operands[0], operands[1])
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&& !D_REG_P (operands[1])"
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&& !(D_REG_P (operands[1]) || Q_REG_P (operands[1]))"
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[(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
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(set (match_dup 2) (reg:HI D_REGNUM))])
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(set (reg:QI D_REGNUM) (match_dup 1))
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@ -953,9 +955,9 @@
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(define_split
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[(set (match_operand:QI 0 "nonimmediate_operand" "")
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(match_operand:QI 1 "hard_addr_reg_operand" ""))]
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"z_replacement_completed == 2 && GET_MODE (operands[1]) == QImode
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"z_replacement_completed == 2
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&& !reg_mentioned_p (operands[1], operands[0])
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&& !D_REG_P (operands[0])"
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&& !(D_REG_P (operands[0]) || Q_REG_P (operands[0]))"
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[(parallel [(set (reg:HI D_REGNUM) (match_dup 2))
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(set (match_dup 2) (reg:HI D_REGNUM))])
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(set (match_dup 0) (reg:QI D_REGNUM))
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@ -4443,6 +4445,13 @@
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{
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m68hc11_split_move (m68hc11_gen_lowpart (SImode, operands[0]),
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const0_rtx, operands[2]);
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/* Adjust first operand if it uses SP so that we take into
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account the above push. Can occur only for 68HC12. */
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if (reg_mentioned_p (gen_rtx (REG, HImode, HARD_SP_REGNUM),
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operands[1]))
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operands[1] = adjust_address (operands[1],
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GET_MODE (operands[0]), 4);
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}
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m68hc11_split_move (m68hc11_gen_highpart (SImode, operands[0]),
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m68hc11_gen_lowpart (SImode, operands[1]),
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@ -4531,14 +4540,24 @@
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(const_int 16))
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(match_operand:SI 2 "general_operand" "")))]
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"z_replacement_completed == 2 && X_REG_P (operands[1])"
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[(set (reg:HI D_REGNUM) (reg:HI X_REGNUM))
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[(set (reg:HI D_REGNUM) (match_dup 5))
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(set (reg:HI X_REGNUM) (match_dup 3))
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(set (reg:HI D_REGNUM) (plus:HI (reg:HI D_REGNUM) (match_dup 4)))
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(set (reg:HI X_REGNUM) (plus:HI (plus:HI (reg:HI X_REGNUM)
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(const_int 0))
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(reg:HI CC_REGNUM)))]
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"operands[3] = m68hc11_gen_highpart (HImode, operands[2]);
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operands[4] = m68hc11_gen_lowpart (HImode, operands[2]);")
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if (X_REG_P (operands[2]))
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{
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operands[4] = gen_rtx (REG, HImode, HARD_X_REGNUM);
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operands[5] = gen_rtx (REG, HImode, HARD_D_REGNUM);
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}
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else
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{
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operands[4] = m68hc11_gen_lowpart (HImode, operands[2]);
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operands[5] = gen_rtx (REG, HImode, HARD_X_REGNUM);
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}
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")
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(define_insn "addsi_ashift16"
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[(set (match_operand:SI 0 "register_operand" "=D")
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