altivec.md (*altivec_lvx_<mode>_internal): Remove asterisk from name so this can be generated directly.
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/altivec.md (*altivec_lvx_<mode>_internal): Remove asterisk from name so this can be generated directly. (*altivec_stvx_<mode>_internal): Likewise. * config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Add assert that this is never called during or after reload/lra. (rs6000_frame_related): Remove split_reg argument and logic that references it. (emit_frame_save): Remove last parameter from call to rs6000_frame_related. (rs6000_emit_prologue): Remove last parameter from eight calls to rs6000_frame_related. Force generation of stvx instruction for Altivec register saves. Remove split_reg handling, which is no longer needed. (rs6000_emit_epilogue): Force generation of lvx instruction for Altivec register restores. From-SVN: r222385
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@ -1,3 +1,21 @@
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2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/altivec.md (*altivec_lvx_<mode>_internal): Remove
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asterisk from name so this can be generated directly.
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(*altivec_stvx_<mode>_internal): Likewise.
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* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Add assert
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that this is never called during or after reload/lra.
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(rs6000_frame_related): Remove split_reg
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argument and logic that references it.
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(emit_frame_save): Remove last parameter from call to
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rs6000_frame_related.
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(rs6000_emit_prologue): Remove last parameter from eight calls to
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rs6000_frame_related. Force generation of stvx instruction for
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Altivec register saves. Remove split_reg handling, which is no
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longer needed.
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(rs6000_emit_epilogue): Force generation of lvx instruction for
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Altivec register restores.
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2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/rs6000.opt (mcrypto): Change option description to
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* config/rs6000/rs6000.opt (mcrypto): Change option description to
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@ -2455,7 +2455,7 @@
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}
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}
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})
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})
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(define_insn "*altivec_lvx_<mode>_internal"
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(define_insn "altivec_lvx_<mode>_internal"
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[(parallel
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[(parallel
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[(set (match_operand:VM2 0 "register_operand" "=v")
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[(set (match_operand:VM2 0 "register_operand" "=v")
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(match_operand:VM2 1 "memory_operand" "Z"))
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(match_operand:VM2 1 "memory_operand" "Z"))
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@ -2478,7 +2478,7 @@
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}
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}
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})
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})
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(define_insn "*altivec_stvx_<mode>_internal"
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(define_insn "altivec_stvx_<mode>_internal"
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[(parallel
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[(parallel
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[(set (match_operand:VM2 0 "memory_operand" "=Z")
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[(set (match_operand:VM2 0 "memory_operand" "=Z")
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(match_operand:VM2 1 "register_operand" "v"))
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(match_operand:VM2 1 "register_operand" "v"))
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@ -8398,6 +8398,11 @@ rs6000_emit_le_vsx_store (rtx dest, rtx source, machine_mode mode)
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{
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{
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rtx tmp, permute_src, permute_tmp;
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rtx tmp, permute_src, permute_tmp;
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/* This should never be called during or after reload, because it does
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not re-permute the source register. It is intended only for use
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during expand. */
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gcc_assert (!reload_in_progress && !lra_in_progress && !reload_completed);
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/* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,
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/* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,
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V1TImode). */
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V1TImode). */
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if (mode == TImode || mode == V1TImode)
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if (mode == TImode || mode == V1TImode)
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@ -22795,7 +22800,7 @@ output_probe_stack_range (rtx reg1, rtx reg2)
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static rtx
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static rtx
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rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
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rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
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rtx reg2, rtx rreg, rtx split_reg)
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rtx reg2, rtx rreg)
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{
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{
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rtx real, temp;
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rtx real, temp;
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@ -22886,11 +22891,6 @@ rs6000_frame_related (rtx insn, rtx reg, HOST_WIDE_INT val,
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}
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}
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}
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}
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/* If a store insn has been split into multiple insns, the
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true source register is given by split_reg. */
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if (split_reg != NULL_RTX)
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real = gen_rtx_SET (VOIDmode, SET_DEST (real), split_reg);
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RTX_FRAME_RELATED_P (insn) = 1;
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RTX_FRAME_RELATED_P (insn) = 1;
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add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);
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add_reg_note (insn, REG_FRAME_RELATED_EXPR, real);
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@ -22998,7 +22998,7 @@ emit_frame_save (rtx frame_reg, machine_mode mode,
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reg = gen_rtx_REG (mode, regno);
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reg = gen_rtx_REG (mode, regno);
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insn = emit_insn (gen_frame_store (reg, frame_reg, offset));
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insn = emit_insn (gen_frame_store (reg, frame_reg, offset));
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return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,
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return rs6000_frame_related (insn, frame_reg, frame_reg_to_sp,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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}
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}
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/* Emit an offset memory reference suitable for a frame store, while
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/* Emit an offset memory reference suitable for a frame store, while
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@ -23578,7 +23578,7 @@ rs6000_emit_prologue (void)
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insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
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insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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treg, GEN_INT (-info->total_size), NULL_RTX);
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treg, GEN_INT (-info->total_size));
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sp_off = frame_off = info->total_size;
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sp_off = frame_off = info->total_size;
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}
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}
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@ -23663,7 +23663,7 @@ rs6000_emit_prologue (void)
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insn = emit_move_insn (mem, reg);
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insn = emit_move_insn (mem, reg);
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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END_USE (0);
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END_USE (0);
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}
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}
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}
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}
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@ -23719,7 +23719,7 @@ rs6000_emit_prologue (void)
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info->lr_save_offset,
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info->lr_save_offset,
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DFmode, sel);
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DFmode, sel);
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rs6000_frame_related (insn, ptr_reg, sp_off,
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rs6000_frame_related (insn, ptr_reg, sp_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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if (lr)
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if (lr)
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END_USE (0);
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END_USE (0);
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}
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}
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@ -23798,7 +23798,7 @@ rs6000_emit_prologue (void)
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SAVRES_SAVE | SAVRES_GPR);
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SAVRES_SAVE | SAVRES_GPR);
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rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,
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rs6000_frame_related (insn, spe_save_area_ptr, sp_off - save_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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}
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}
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/* Move the static chain pointer back. */
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/* Move the static chain pointer back. */
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@ -23848,7 +23848,7 @@ rs6000_emit_prologue (void)
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info->lr_save_offset + ptr_off,
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info->lr_save_offset + ptr_off,
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reg_mode, sel);
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reg_mode, sel);
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rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,
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rs6000_frame_related (insn, ptr_reg, sp_off - ptr_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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if (lr)
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if (lr)
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END_USE (0);
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END_USE (0);
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}
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}
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@ -23864,7 +23864,7 @@ rs6000_emit_prologue (void)
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info->gp_save_offset + frame_off + reg_size * i);
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info->gp_save_offset + frame_off + reg_size * i);
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insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
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insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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}
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}
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else if (!WORLD_SAVE_P (info))
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else if (!WORLD_SAVE_P (info))
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{
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{
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@ -24187,7 +24187,7 @@ rs6000_emit_prologue (void)
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info->altivec_save_offset + ptr_off,
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info->altivec_save_offset + ptr_off,
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0, V4SImode, SAVRES_SAVE | SAVRES_VR);
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0, V4SImode, SAVRES_SAVE | SAVRES_VR);
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rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,
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rs6000_frame_related (insn, scratch_reg, sp_off - ptr_off,
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NULL_RTX, NULL_RTX, NULL_RTX);
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NULL_RTX, NULL_RTX);
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if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))
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if (REGNO (frame_reg_rtx) == REGNO (scratch_reg))
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{
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{
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/* The oddity mentioned above clobbered our frame reg. */
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/* The oddity mentioned above clobbered our frame reg. */
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@ -24203,7 +24203,7 @@ rs6000_emit_prologue (void)
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for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
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for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
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if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
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if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
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{
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{
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rtx areg, savereg, mem, split_reg;
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rtx areg, savereg, mem;
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int offset;
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int offset;
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offset = (info->altivec_save_offset + frame_off
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offset = (info->altivec_save_offset + frame_off
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@ -24219,20 +24219,13 @@ rs6000_emit_prologue (void)
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mem = gen_frame_mem (V4SImode,
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mem = gen_frame_mem (V4SImode,
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gen_rtx_PLUS (Pmode, frame_reg_rtx, areg));
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gen_rtx_PLUS (Pmode, frame_reg_rtx, areg));
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insn = emit_move_insn (mem, savereg);
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/* Rather than emitting a generic move, force use of the stvx
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instruction, which we always want. In particular we don't
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/* When we split a VSX store into two insns, we need to make
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want xxpermdi/stxvd2x for little endian. */
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sure the DWARF info knows which register we are storing.
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insn = emit_insn (gen_altivec_stvx_v4si_internal (mem, savereg));
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Pass it in to be used on the appropriate note. */
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if (!BYTES_BIG_ENDIAN
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&& GET_CODE (PATTERN (insn)) == SET
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&& GET_CODE (SET_SRC (PATTERN (insn))) == VEC_SELECT)
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split_reg = savereg;
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else
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split_reg = NULL_RTX;
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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rs6000_frame_related (insn, frame_reg_rtx, sp_off - frame_off,
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areg, GEN_INT (offset), split_reg);
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areg, GEN_INT (offset));
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}
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}
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}
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}
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@ -24873,7 +24866,10 @@ rs6000_emit_epilogue (int sibcall)
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mem = gen_frame_mem (V4SImode, addr);
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mem = gen_frame_mem (V4SImode, addr);
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reg = gen_rtx_REG (V4SImode, i);
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reg = gen_rtx_REG (V4SImode, i);
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emit_move_insn (reg, mem);
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/* Rather than emitting a generic move, force use of the
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lvx instruction, which we always want. In particular
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we don't want lxvd2x/xxpermdi for little endian. */
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(void) emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
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}
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}
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}
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}
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@ -25076,7 +25072,10 @@ rs6000_emit_epilogue (int sibcall)
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mem = gen_frame_mem (V4SImode, addr);
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mem = gen_frame_mem (V4SImode, addr);
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reg = gen_rtx_REG (V4SImode, i);
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reg = gen_rtx_REG (V4SImode, i);
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emit_move_insn (reg, mem);
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/* Rather than emitting a generic move, force use of the
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lvx instruction, which we always want. In particular
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we don't want lxvd2x/xxpermdi for little endian. */
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(void) emit_insn (gen_altivec_lvx_v4si_internal (reg, mem));
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}
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}
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}
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}
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