[AArch64 costs 7/18] Improve SET cost.
gcc/ * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing for SET RTX. Co-Authored-By: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> From-SVN: r210499
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@ -1,3 +1,9 @@
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2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
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Philip Tomsich <philipp.tomsich@theobroma-systems.com>
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* config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing
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for SET RTX.
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2014-05-16 James Greenhalgh <james.greenhalgh@arm.com>
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* config/aarch64/aarch64.c (aarch64_rtx_costs): Set default costs.
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@ -4861,6 +4861,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
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switch (code)
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{
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case SET:
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/* The cost depends entirely on the operands to SET. */
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*cost = 0;
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op0 = SET_DEST (x);
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op1 = SET_SRC (x);
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@ -4870,23 +4872,33 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
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if (speed)
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*cost += extra_cost->ldst.store;
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if (op1 != const0_rtx)
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*cost += rtx_cost (op1, SET, 1, speed);
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*cost += rtx_cost (op1, SET, 1, speed);
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return true;
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case SUBREG:
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if (! REG_P (SUBREG_REG (op0)))
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*cost += rtx_cost (SUBREG_REG (op0), SET, 0, speed);
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/* Fall through. */
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case REG:
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/* Cost is just the cost of the RHS of the set. */
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*cost += rtx_cost (op1, SET, 1, true);
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/* const0_rtx is in general free, but we will use an
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instruction to set a register to 0. */
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if (REG_P (op1) || op1 == const0_rtx)
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{
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/* The cost is 1 per register copied. */
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int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
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/ UNITS_PER_WORD;
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*cost = COSTS_N_INSNS (n_minus_1 + 1);
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}
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else
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/* Cost is just the cost of the RHS of the set. */
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*cost += rtx_cost (op1, SET, 1, speed);
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return true;
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case ZERO_EXTRACT: /* Bit-field insertion. */
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case ZERO_EXTRACT:
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case SIGN_EXTRACT:
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/* Strip any redundant widening of the RHS to meet the width of
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the target. */
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/* Bit-field insertion. Strip any redundant widening of
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the RHS to meet the width of the target. */
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if (GET_CODE (op1) == SUBREG)
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op1 = SUBREG_REG (op1);
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if ((GET_CODE (op1) == ZERO_EXTEND
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@ -4895,10 +4907,25 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
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&& (GET_MODE_BITSIZE (GET_MODE (XEXP (op1, 0)))
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>= INTVAL (XEXP (op0, 1))))
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op1 = XEXP (op1, 0);
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*cost += rtx_cost (op1, SET, 1, speed);
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if (CONST_INT_P (op1))
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{
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/* MOV immediate is assumed to always be cheap. */
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*cost = COSTS_N_INSNS (1);
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}
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else
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{
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/* BFM. */
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if (speed)
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*cost += extra_cost->alu.bfi;
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*cost += rtx_cost (op1, (enum rtx_code) code, 1, speed);
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}
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return true;
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default:
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/* We can't make sense of this, assume default cost. */
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*cost = COSTS_N_INSNS (1);
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break;
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}
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return false;
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