From ba45a61315a195eccfe337f87e3f03cffff8430d Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Wed, 26 Sep 2012 07:18:43 +0200 Subject: [PATCH] re PR target/51274 (Starting with GCC 4.5, powerpc generated different code for x != 0.) gcc/ PR target/51274 PR target/53087 * config/rs6000/rs6000.md (ne0si): Remove unnecessary earlyclobber. Merge with... (ne0di): ... to... (ne0_): New. (plus_ne0si): Merge with... (plus_ne0di): ... to... (plus_ne0_): New. (compare_plus_ne0si): Merge with... (compare_plus_ne0di)... to... (compare_plus_ne0_): New. (compare_plus_ne0__1): New. (plus_ne0si_compare): Merge with... (plus_ne0di_compare)... to... (plus_ne0__compare): New. gcc/testsuite/ PR target/51274 PR target/53087 * gcc.target/powerpc/ppc-ne0-1.c: New. From-SVN: r191752 --- gcc/ChangeLog | 19 ++ gcc/config/rs6000/rs6000.md | 231 +++++++------------ gcc/testsuite/ChangeLog | 6 + gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c | 33 +++ 4 files changed, 137 insertions(+), 152 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 953b07e908a..9941f62612d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,22 @@ +2012-09-25 Segher Boessenkool + + PR target/51274 + PR target/53087 + * config/rs6000/rs6000.md (ne0si): Remove unnecessary + earlyclobber. Merge with... + (ne0di): ... to... + (ne0_): New. + (plus_ne0si): Merge with... + (plus_ne0di): ... to... + (plus_ne0_): New. + (compare_plus_ne0si): Merge with... + (compare_plus_ne0di)... to... + (compare_plus_ne0_): New. + (compare_plus_ne0__1): New. + (plus_ne0si_compare): Merge with... + (plus_ne0di_compare)... to... + (plus_ne0__compare): New. + 2012-09-25 Oleg Endo PR target/54089 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 9f96270727b..4265cb67b0f 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11970,101 +11970,36 @@ operands[3] = operands[1]; }) -;; Simplify (ne X (const_int 0)) on the PowerPC. No need to on the Power, -;; since it nabs/sr is just as fast. -(define_insn "*ne0si" - [(set (match_operand:SI 0 "gpc_reg_operand" "=&r") - (lshiftrt:SI (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r"))) - (const_int 31))) - (clobber (match_scratch:SI 2 "=&r"))] - "TARGET_32BIT && !TARGET_ISEL" +(define_insn "*ne0_" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (ne:P (match_operand:P 1 "gpc_reg_operand" "r") + (const_int 0))) + (clobber (match_scratch:P 2 "=&r"))] + "!(TARGET_32BIT && TARGET_ISEL)" "addic %2,%1,-1\;subfe %0,%2,%1" [(set_attr "type" "two") (set_attr "length" "8")]) -(define_insn "*ne0di" - [(set (match_operand:DI 0 "gpc_reg_operand" "=r") - (lshiftrt:DI (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r"))) - (const_int 63))) - (clobber (match_scratch:DI 2 "=&r"))] - "TARGET_64BIT" - "addic %2,%1,-1\;subfe %0,%2,%1" - [(set_attr "type" "two") - (set_attr "length" "8")]) - -;; This is what (plus (ne X (const_int 0)) Y) looks like. -(define_insn "*plus_ne0si" - [(set (match_operand:SI 0 "gpc_reg_operand" "=r") - (plus:SI (lshiftrt:SI - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r"))) - (const_int 31)) - (match_operand:SI 2 "gpc_reg_operand" "r"))) - (clobber (match_scratch:SI 3 "=&r"))] - "TARGET_32BIT" +(define_insn "*plus_ne0_" + [(set (match_operand:P 0 "gpc_reg_operand" "=r") + (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r") + (const_int 0)) + (match_operand:P 2 "gpc_reg_operand" "r"))) + (clobber (match_scratch:P 3 "=&r"))] + "" "addic %3,%1,-1\;addze %0,%2" [(set_attr "type" "two") (set_attr "length" "8")]) -(define_insn "*plus_ne0di" - [(set (match_operand:DI 0 "gpc_reg_operand" "=r") - (plus:DI (lshiftrt:DI - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r"))) - (const_int 63)) - (match_operand:DI 2 "gpc_reg_operand" "r"))) - (clobber (match_scratch:DI 3 "=&r"))] - "TARGET_64BIT" - "addic %3,%1,-1\;addze %0,%2" - [(set_attr "type" "two") - (set_attr "length" "8")]) - -(define_insn "*compare_plus_ne0si" +(define_insn "*compare_plus_ne0_" [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") - (compare:CC - (plus:SI (lshiftrt:SI - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r"))) - (const_int 31)) - (match_operand:SI 2 "gpc_reg_operand" "r,r")) - (const_int 0))) - (clobber (match_scratch:SI 3 "=&r,&r")) - (clobber (match_scratch:SI 4 "=X,&r"))] - "TARGET_32BIT" - "@ - addic %3,%1,-1\;addze. %3,%2 - #" - [(set_attr "type" "compare") - (set_attr "length" "8,12")]) - -(define_split - [(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "") - (compare:CC - (plus:SI (lshiftrt:SI - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))) - (const_int 31)) - (match_operand:SI 2 "gpc_reg_operand" "")) - (const_int 0))) - (clobber (match_scratch:SI 3 "")) - (clobber (match_scratch:SI 4 ""))] - "TARGET_32BIT && reload_completed" - [(parallel [(set (match_dup 3) - (plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) - (const_int 31)) - (match_dup 2))) - (clobber (match_dup 4))]) - (set (match_dup 0) - (compare:CC (match_dup 3) - (const_int 0)))] - "") - -(define_insn "*compare_plus_ne0di" - [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y") - (compare:CC - (plus:DI (lshiftrt:DI - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))) - (const_int 63)) - (match_operand:DI 2 "gpc_reg_operand" "r,r")) - (const_int 0))) - (clobber (match_scratch:DI 3 "=&r,&r"))] - "TARGET_64BIT" + (compare:CC (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r") + (const_int 0)) + (match_operand:P 2 "gpc_reg_operand" "r,r")) + (const_int 0))) + (clobber (match_scratch:P 3 "=&r,&r")) + (clobber (match_scratch:P 4 "=X,&r"))] + "" "@ addic %3,%1,-1\;addze. %3,%2 #" @@ -12073,77 +12008,68 @@ (define_split [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "") - (compare:CC - (plus:DI (lshiftrt:DI - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))) - (const_int 63)) - (match_operand:DI 2 "gpc_reg_operand" "")) - (const_int 0))) - (clobber (match_scratch:DI 3 ""))] - "TARGET_64BIT && reload_completed" - [(set (match_dup 3) - (plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) - (const_int 63)) - (match_dup 2))) + (compare:CC (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r") + (const_int 0)) + (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r")))) + (clobber (match_scratch:P 3 "")) + (clobber (match_scratch:P 4 ""))] + "reload_completed" + [(parallel [(set (match_dup 3) + (plus:P (ne:P (match_dup 1) + (const_int 0)) + (match_dup 2))) + (clobber (match_dup 4))]) (set (match_dup 0) (compare:CC (match_dup 3) (const_int 0)))] "") -(define_insn "*plus_ne0si_compare" - [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y") - (compare:CC - (plus:SI (lshiftrt:SI - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,r"))) - (const_int 31)) - (match_operand:SI 2 "gpc_reg_operand" "r,r")) - (const_int 0))) - (set (match_operand:SI 0 "gpc_reg_operand" "=r,r") - (plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31)) - (match_dup 2))) - (clobber (match_scratch:SI 3 "=&r,&r"))] - "TARGET_32BIT" +; For combine. +(define_insn "*compare_plus_ne0__1" + [(set (match_operand:CCEQ 0 "cc_reg_operand" "=x,?y") + (compare:CCEQ (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r") + (const_int 0)) + (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r")))) + (clobber (match_scratch:P 3 "=&r,&r")) + (clobber (match_scratch:P 4 "=X,&r"))] + "" "@ - addic %3,%1,-1\;addze. %0,%2 + addic %3,%1,-1\;addze. %3,%2 #" [(set_attr "type" "compare") (set_attr "length" "8,12")]) (define_split - [(set (match_operand:CC 4 "cc_reg_not_cr0_operand" "") - (compare:CC - (plus:SI (lshiftrt:SI - (neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))) - (const_int 31)) - (match_operand:SI 2 "gpc_reg_operand" "")) - (const_int 0))) - (set (match_operand:SI 0 "gpc_reg_operand" "") - (plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31)) - (match_dup 2))) - (clobber (match_scratch:SI 3 ""))] - "TARGET_32BIT && reload_completed" - [(parallel [(set (match_dup 0) - (plus:SI (lshiftrt:SI (neg:SI (abs:SI (match_dup 1))) (const_int 31)) - (match_dup 2))) - (clobber (match_dup 3))]) - (set (match_dup 4) - (compare:CC (match_dup 0) + [(set (match_operand:CCEQ 0 "cc_reg_not_micro_cr0_operand" "") + (compare:CCEQ (ne:P (match_operand:SI 1 "gpc_reg_operand" "r,r") + (const_int 0)) + (neg:P (match_operand:P 2 "gpc_reg_operand" "r,r")))) + (clobber (match_scratch:P 3 "")) + (clobber (match_scratch:P 4 ""))] + "reload_completed" + [(parallel [(set (match_dup 3) + (plus:P (ne:P (match_dup 1) + (const_int 0)) + (match_dup 2))) + (clobber (match_dup 4))]) + (set (match_dup 0) + (compare:CC (match_dup 3) (const_int 0)))] "") -(define_insn "*plus_ne0di_compare" +(define_insn "*plus_ne0__compare" [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y") (compare:CC - (plus:DI (lshiftrt:DI - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))) - (const_int 63)) - (match_operand:DI 2 "gpc_reg_operand" "r,r")) + (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "r,r") + (const_int 0)) + (match_operand:P 2 "gpc_reg_operand" "r,r")) (const_int 0))) - (set (match_operand:DI 0 "gpc_reg_operand" "=r,r") - (plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) - (match_dup 2))) - (clobber (match_scratch:DI 3 "=&r,&r"))] - "TARGET_64BIT" + (set (match_operand:P 0 "gpc_reg_operand" "=r,r") + (plus:P (ne:P (match_dup 1) + (const_int 0)) + (match_dup 2))) + (clobber (match_scratch:P 3 "=&r,&r"))] + "" "@ addic %3,%1,-1\;addze. %0,%2 #" @@ -12153,20 +12079,21 @@ (define_split [(set (match_operand:CC 4 "cc_reg_not_micro_cr0_operand" "") (compare:CC - (plus:DI (lshiftrt:DI - (neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))) - (const_int 63)) - (match_operand:DI 2 "gpc_reg_operand" "")) + (plus:P (ne:P (match_operand:P 1 "gpc_reg_operand" "") + (const_int 0)) + (match_operand:P 2 "gpc_reg_operand" "")) (const_int 0))) - (set (match_operand:DI 0 "gpc_reg_operand" "") - (plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) - (match_dup 2))) - (clobber (match_scratch:DI 3 ""))] - "TARGET_64BIT && reload_completed" + (set (match_operand:P 0 "gpc_reg_operand" "") + (plus:P (ne:P (match_dup 1) + (const_int 0)) + (match_dup 2))) + (clobber (match_scratch:P 3 ""))] + "reload_completed" [(parallel [(set (match_dup 0) - (plus:DI (lshiftrt:DI (neg:DI (abs:DI (match_dup 1))) (const_int 63)) - (match_dup 2))) - (clobber (match_dup 3))]) + (plus:P (ne:P (match_dup 1) + (const_int 0)) + (match_dup 2))) + (clobber (match_dup 3))]) (set (match_dup 4) (compare:CC (match_dup 0) (const_int 0)))] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dfbab8205cb..3aad84134bf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2012-09-25 Segher Boessenkool + + PR target/51274 + PR target/53087 + * gcc.target/powerpc/ppc-ne0-1.c: New. + 2012-09-25 Oleg Endo PR target/54089 diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c new file mode 100644 index 00000000000..63c4b6087df --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ppc-ne0-1.c @@ -0,0 +1,33 @@ +/* PR target/51274 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mno-isel" } */ + +/* { dg-final { scan-assembler-times "addic" 4 } } */ +/* { dg-final { scan-assembler-times "subfe" 1 } } */ +/* { dg-final { scan-assembler-times "addze" 3 } } */ + +long ne0(long a) +{ + return a != 0; +} + +long plus_ne0(long a, long b) +{ + return (a != 0) + b; +} + +void dummy(void); + +void cmp_plus_ne0(long a, long b) +{ + if ((a != 0) + b) + dummy(); +} + +long plus_ne0_cmp(long a, long b) +{ + a = (a != 0) + b; + if (a) + dummy(); + return a; +}