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re PR tree-optimization/56273 (Bogus -Warray-bounds warning) 

2013-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/56273
	* passes.c (init_optimization_passes): Move second VRP after DOM.

	* gcc.dg/tree-ssa/vrp47.c: Adjust.
	* c-c++-common/uninit-17.c: Likewise.

From-SVN: r196792
This commit is contained in:
Richard Biener 2013-03-19 12:57:33 +00:00 committed by Richard Biener
parent f5e3ed2d42
commit ba65123cbe
5 changed files with 21 additions and 11 deletions
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5
gcc/ChangeLog
View File

@ -1,3 +1,8 @@
2013-03-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/56273
* passes.c (init_optimization_passes): Move second VRP after DOM.
2013-03-19 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*movti_internal): Merge from

2
gcc/passes.c
View File

@ -1488,7 +1488,6 @@ init_optimization_passes (void)
NEXT_PASS (pass_lower_vector_ssa);
NEXT_PASS (pass_cse_reciprocals);
NEXT_PASS (pass_reassoc);
NEXT_PASS (pass_vrp);
NEXT_PASS (pass_strength_reduction);
NEXT_PASS (pass_dominator);
/* The only const/copy propagation opportunities left after
@ -1497,6 +1496,7 @@ init_optimization_passes (void)
only examines PHIs to discover const/copy propagation
opportunities. */
NEXT_PASS (pass_phi_only_cprop);
NEXT_PASS (pass_vrp);
NEXT_PASS (pass_cd_dce);
NEXT_PASS (pass_tracer);

6
gcc/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2013-03-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/56273
* gcc.dg/tree-ssa/vrp47.c: Adjust.
* c-c++-common/uninit-17.c: Likewise.
2013-03-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/56635

4
gcc/testsuite/c-c++-common/uninit-17.c
View File

@ -11,9 +11,9 @@ static void bar(int a, int *ptr)
{
int b; /* { dg-message "declared" } */
if (b < 40) {
ptr[0] = b;
ptr[0] = b; /* { dg-warning "may be used uninitialized" } */
}
b += 1; /* { dg-warning "may be used uninitialized" } */
b += 1;
ptr++;
}
while (--a != 0);

15
gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
View File

@ -4,7 +4,7 @@
jumps when evaluating an && condition. VRP is not able to optimize
this. */
/* { dg-do compile { target { ! "mips*-*-* s390*-*-* avr-*-* mn10300-*-*" } } } */
/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom1 -fdump-tree-dom2" } */
/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom1 -fdump-tree-vrp2" } */
/* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
/* Skip on ARM Cortex-M0, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to false,
leading to two conditional jumps when evaluating an && condition. VRP is
@ -40,15 +40,14 @@ int f(int x)
0 or 1. */
/* { dg-final { scan-tree-dump-times "\[xy\]\[^ \]* !=" 0 "vrp1" } } */
/* This one needs more copy propagation that only happens in dom1. */
/* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "dom1" { xfail *-*-* } } } */
/* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "dom2" } } */
/* { dg-final { scan-tree-dump-times "x\[^ \]* & y" 1 "vrp1" { xfail *-*-* } } } */
/* These two are fully simplified by VRP. */
/* These two are fully simplified by VRP1. */
/* { dg-final { scan-tree-dump-times "x\[^ \]* \[|\] y" 1 "vrp1" } } */
/* { dg-final { scan-tree-dump-times "x\[^ \]* \\^ 1" 1 "vrp1" } } */
/* VRP2 gets rid of the remaining & 1 operations, x and y are always
either 0 or 1. */
/* { dg-final { scan-tree-dump-times " & 1;" 0 "vrp2" } } */
/* { dg-final { cleanup-tree-dump "vrp1" } } */
/* { dg-final { cleanup-tree-dump "dom1" } } */
/* { dg-final { cleanup-tree-dump "dom2" } } */
/* { dg-final { cleanup-tree-dump "vrp2" } } */