Simplify post epilogue_completed splitters.
Now that we have post epilogue_completed split point for all optimization levels, we can simplify post epilogue_completed splitters considerably. If corresponding define_peephole2 pattern fails to allocate a temporary register (or if peephole2 pass isn't run at all), we can now always split invalid RTX after epilogue_completed is set. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove. (*pushdi2_rex64 peephole2): Unconditionally split after epilogue_completed. (*ashl<mode>3_doubleword): Ditto. (*<shift_insn><mode>3_doubleword): Ditto.
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@ -1,3 +1,11 @@
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2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
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(*pushdi2_rex64 peephole2): Unconditionally split after
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epilogue_completed.
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(*ashl<mode>3_doubleword): Ditto.
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(*<shift_insn><mode>3_doubleword): Ditto.
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2020-02-05 Michael Meissner <meissner@linux.ibm.com>
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PR target/93568
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@ -1688,38 +1688,21 @@
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;; First try to get scratch register and go through it. In case this
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;; fails, push sign extended lower part first and then overwrite
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;; upper part by 32bit move.
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(define_peephole2
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[(match_scratch:DI 2 "r")
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(set (match_operand:DI 0 "push_operand")
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(match_operand:DI 1 "immediate_operand"))]
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"TARGET_64BIT && !symbolic_operand (operands[1], DImode)
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"TARGET_64BIT
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&& !symbolic_operand (operands[1], DImode)
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&& !x86_64_immediate_operand (operands[1], DImode)"
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[(set (match_dup 2) (match_dup 1))
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(set (match_dup 0) (match_dup 2))])
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;; We need to define this as both peepholer and splitter for case
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;; peephole2 pass is not run.
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;; "&& 1" is needed to keep it from matching the previous pattern.
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(define_peephole2
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[(set (match_operand:DI 0 "push_operand")
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(match_operand:DI 1 "immediate_operand"))]
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"TARGET_64BIT && !symbolic_operand (operands[1], DImode)
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&& !x86_64_immediate_operand (operands[1], DImode) && 1"
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[(set (match_dup 0) (match_dup 1))
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(set (match_dup 2) (match_dup 3))]
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{
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split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);
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operands[1] = gen_lowpart (DImode, operands[2]);
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operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,
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GEN_INT (4)));
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})
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(define_split
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[(set (match_operand:DI 0 "push_operand")
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(match_operand:DI 1 "immediate_operand"))]
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"TARGET_64BIT && ((optimize > 0 && flag_peephole2)
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? epilogue_completed : reload_completed)
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"TARGET_64BIT && epilogue_completed
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&& !symbolic_operand (operands[1], DImode)
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&& !x86_64_immediate_operand (operands[1], DImode)"
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[(set (match_dup 0) (match_dup 1))
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@ -10586,7 +10569,7 @@
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(ashift:DWI (match_operand:DWI 1 "nonmemory_operand")
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(match_operand:QI 2 "nonmemory_operand")))
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(clobber (reg:CC FLAGS_REG))]
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"(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
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"epilogue_completed"
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[(const_int 0)]
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"ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;")
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@ -11338,7 +11321,7 @@
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(clobber (reg:CC FLAGS_REG))]
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""
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"#"
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"(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
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"epilogue_completed"
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[(const_int 0)]
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"ix86_split_<shift_insn> (operands, NULL_RTX, <MODE>mode); DONE;"
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[(set_attr "type" "multi")])
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