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[AArch64] Handle CSEL of zero_extended operands in rtx costs

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* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle
	CSEL of zero_extended registers.

From-SVN: r232442
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Kyrylo Tkachov 2016-01-15 17:30:12 +00:00 committed by Kyrylo Tkachov
parent 345854d804
commit bad00732aa
2 changed files with 11 additions and 0 deletions
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@ -1,3 +1,8 @@
2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle
CSEL of zero_extended registers.
2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case): * config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case):

6
gcc/config/aarch64/aarch64.c
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@ -6145,6 +6145,12 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
|| GET_CODE (op1) == NOT || GET_CODE (op1) == NOT
|| (GET_CODE (op1) == PLUS && XEXP (op1, 1) == const1_rtx)) || (GET_CODE (op1) == PLUS && XEXP (op1, 1) == const1_rtx))
op1 = XEXP (op1, 0); op1 = XEXP (op1, 0);
else if (GET_CODE (op1) == ZERO_EXTEND && GET_CODE (op2) == ZERO_EXTEND)
{
/* CSEL with zero-extension (*cmovdi_insn_uxtw). */
op1 = XEXP (op1, 0);
op2 = XEXP (op2, 0);
}
*cost += rtx_cost (op1, VOIDmode, IF_THEN_ELSE, 1, speed); *cost += rtx_cost (op1, VOIDmode, IF_THEN_ELSE, 1, speed);
*cost += rtx_cost (op2, VOIDmode, IF_THEN_ELSE, 2, speed); *cost += rtx_cost (op2, VOIDmode, IF_THEN_ELSE, 2, speed);