[AArch64] Handle CSEL of zero_extended operands in rtx costs
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle CSEL of zero_extended registers. From-SVN: r232442
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2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Handle
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CSEL of zero_extended registers.
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2016-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64.c (aarch64_rtx_costs, COMPARE case):
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@ -6145,6 +6145,12 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
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|| GET_CODE (op1) == NOT
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|| (GET_CODE (op1) == PLUS && XEXP (op1, 1) == const1_rtx))
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op1 = XEXP (op1, 0);
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else if (GET_CODE (op1) == ZERO_EXTEND && GET_CODE (op2) == ZERO_EXTEND)
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{
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/* CSEL with zero-extension (*cmovdi_insn_uxtw). */
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op1 = XEXP (op1, 0);
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op2 = XEXP (op2, 0);
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}
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*cost += rtx_cost (op1, VOIDmode, IF_THEN_ELSE, 1, speed);
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*cost += rtx_cost (op2, VOIDmode, IF_THEN_ELSE, 2, speed);
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