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sfp-machine.h (_FP_NANSIGN_S, [...]): Move ... 

* config/i386/32/sfp-machine.h (_FP_NANSIGN_S, _FP_NANSIGN_D,
	_FP_NANSIGN_E, _FP_NANSIGN_Q): Move ...
	* config/i386/64/sfp-machine: ... (delete here) ...
	* config/i386/sfp-machine.h: ... to here.
	(FP_EX_MASK): Remove.
	(FP_RND_MASK): New.
	(FP_INIT_ROUNDMODE): Declare asm as volatile.

From-SVN: r188518
This commit is contained in:
Uros Bizjak 2012-06-13 17:23:12 +02:00 committed by Uros Bizjak
parent cf35667e23
commit bb5c97d42c
4 changed files with 27 additions and 20 deletions
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10
libgcc/ChangeLog
View File

@ -1,3 +1,13 @@
2012-06-13 Uros Bizjak <ubizjak@gmail.com>
* config/i386/32/sfp-machine.h (_FP_NANSIGN_S, _FP_NANSIGN_D,
_FP_NANSIGN_E, _FP_NANSIGN_Q): Move ...
* config/i386/64/sfp-machine: ... (delete here) ...
* config/i386/sfp-machine.h: ... to here.
(FP_EX_MASK): Remove.
(FP_RND_MASK): New.
(FP_INIT_ROUNDMODE): Declare asm as volatile.
2012-06-11 Sriraman Tallam <tmsriram@google.com>
* config/i386/libgcc-bsd.ver: Version symbol __cpu_indicator_init.

6
libgcc/config/i386/32/sfp-machine.h
View File

@ -65,7 +65,7 @@
"g" ((USItype) (y0)))
#define _FP_MUL_MEAT_Q(R,X,Y) \
#define _FP_MUL_MEAT_Q(R,X,Y) \
_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
@ -76,7 +76,3 @@
16byte since soft-fp emulation is done in 16byte. */
#define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0
#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0
#define _FP_NANSIGN_S 1
#define _FP_NANSIGN_D 1
#define _FP_NANSIGN_E 1
#define _FP_NANSIGN_Q 1

6
libgcc/config/i386/64/sfp-machine.h
View File

@ -8,7 +8,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI)));
#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
#define _FP_MUL_MEAT_Q(R,X,Y) \
#define _FP_MUL_MEAT_Q(R,X,Y) \
_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
@ -17,7 +17,3 @@ typedef unsigned int UTItype __attribute__ ((mode (TI)));
#define _FP_NANFRAC_D _FP_QNANBIT_D
#define _FP_NANFRAC_E _FP_QNANBIT_E, 0
#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0
#define _FP_NANSIGN_S 1
#define _FP_NANSIGN_D 1
#define _FP_NANSIGN_E 1
#define _FP_NANSIGN_Q 1

25
libgcc/config/i386/sfp-machine.h
View File

@ -14,7 +14,12 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
#include "config/i386/32/sfp-machine.h"
#endif
#define _FP_KEEPNANFRACP 1
#define _FP_KEEPNANFRACP 1
#define _FP_NANSIGN_S 1
#define _FP_NANSIGN_D 1
#define _FP_NANSIGN_E 1
#define _FP_NANSIGN_Q 1
/* Here is something Intel misdesigned: the specs don't define
the case where we have two NaNs with same mantissas, but
@ -25,12 +30,12 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
|| (_FP_FRAC_EQ_##wc(X,Y) && (OP == '+' || OP == '*'))) \
{ \
R##_s = X##_s; \
_FP_FRAC_COPY_##wc(R,X); \
_FP_FRAC_COPY_##wc(R,X); \
} \
else \
{ \
R##_s = Y##_s; \
_FP_FRAC_COPY_##wc(R,Y); \
_FP_FRAC_COPY_##wc(R,Y); \
} \
R##_c = FP_CLS_NAN; \
} while (0)
@ -42,13 +47,11 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
#define FP_EX_UNDERFLOW 0x10
#define FP_EX_INEXACT 0x20
#define FP_EX_MASK 0x3f
void __sfp_handle_exceptions (int);
#define FP_HANDLE_EXCEPTIONS \
do { \
if (_fex & FP_EX_MASK) \
if (_fex) \
__sfp_handle_exceptions (_fex); \
} while (0);
@ -57,15 +60,17 @@ void __sfp_handle_exceptions (int);
#define FP_RND_PINF 0x800
#define FP_RND_MINF 0x400
#define FP_RND_MASK 0xc00
#define _FP_DECL_EX \
unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST
#define FP_INIT_ROUNDMODE \
do { \
__asm__ ("fnstcw %0" : "=m" (_fcw)); \
#define FP_INIT_ROUNDMODE \
do { \
__asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \
} while (0)
#define FP_ROUNDMODE (_fcw & 0xc00)
#define FP_ROUNDMODE (_fcw & FP_RND_MASK)
#define __LITTLE_ENDIAN 1234
#define __BIG_ENDIAN 4321