[AArch64] add barriers to ool __sync builtins
2022-05-13 Sebastian Pop <spop@amazon.com> gcc/ PR target/105162 * config/aarch64/aarch64-protos.h (atomic_ool_names): Increase dimension of str array. * config/aarch64/aarch64.cc (aarch64_atomic_ool_func): Call memmodel_from_int and handle MEMMODEL_SYNC_*. (DEF0): Add __aarch64_*_sync functions. gcc/testsuite/ PR target/105162 * gcc.target/aarch64/sync-comp-swap-ool.c: New. * gcc.target/aarch64/sync-op-acquire-ool.c: New. * gcc.target/aarch64/sync-op-full-ool.c: New. * gcc.target/aarch64/target_attr_20.c: Update check. * gcc.target/aarch64/target_attr_21.c: Same. libgcc/ PR target/105162 * config/aarch64/lse.S: Define BARRIER and handle memory MODEL 5. * config/aarch64/t-lse: Add a 5th memory model for _sync functions.
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Sebastian Pop
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010af1040b
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@ -1065,7 +1065,7 @@ bool aarch64_high_bits_all_ones_p (HOST_WIDE_INT);
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struct atomic_ool_names
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{
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const char *str[5][4];
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const char *str[5][5];
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};
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rtx aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
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@ -22678,14 +22678,14 @@ aarch64_emit_unlikely_jump (rtx insn)
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add_reg_br_prob_note (jump, profile_probability::very_unlikely ());
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}
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/* We store the names of the various atomic helpers in a 5x4 array.
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/* We store the names of the various atomic helpers in a 5x5 array.
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Return the libcall function given MODE, MODEL and NAMES. */
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rtx
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aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
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const atomic_ool_names *names)
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{
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memmodel model = memmodel_base (INTVAL (model_rtx));
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memmodel model = memmodel_from_int (INTVAL (model_rtx));
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int mode_idx, model_idx;
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switch (mode)
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@ -22725,6 +22725,11 @@ aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
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case MEMMODEL_SEQ_CST:
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model_idx = 3;
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break;
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case MEMMODEL_SYNC_ACQUIRE:
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case MEMMODEL_SYNC_RELEASE:
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case MEMMODEL_SYNC_SEQ_CST:
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model_idx = 4;
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break;
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default:
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gcc_unreachable ();
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}
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@ -22737,7 +22742,8 @@ aarch64_atomic_ool_func(machine_mode mode, rtx model_rtx,
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{ "__aarch64_" #B #N "_relax", \
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"__aarch64_" #B #N "_acq", \
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"__aarch64_" #B #N "_rel", \
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"__aarch64_" #B #N "_acq_rel" }
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"__aarch64_" #B #N "_acq_rel", \
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"__aarch64_" #B #N "_sync" }
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#define DEF4(B) DEF0(B, 1), DEF0(B, 2), DEF0(B, 4), DEF0(B, 8), \
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{ NULL, NULL, NULL, NULL }
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6
gcc/testsuite/gcc.target/aarch64/sync-comp-swap-ool.c
Normal file
6
gcc/testsuite/gcc.target/aarch64/sync-comp-swap-ool.c
Normal file
@ -0,0 +1,6 @@
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/* { dg-do compile } */
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/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf -moutline-atomics" } */
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#include "sync-comp-swap.x"
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/* { dg-final { scan-assembler-times "bl.*__aarch64_cas4_sync" 1 } } */
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6
gcc/testsuite/gcc.target/aarch64/sync-op-acquire-ool.c
Normal file
6
gcc/testsuite/gcc.target/aarch64/sync-op-acquire-ool.c
Normal file
@ -0,0 +1,6 @@
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/* { dg-do compile } */
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/* { dg-options "-march=armv8-a+nolse -O2 -moutline-atomics" } */
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#include "sync-op-acquire.x"
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/* { dg-final { scan-assembler-times "bl.*__aarch64_swp4_sync" 1 } } */
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9
gcc/testsuite/gcc.target/aarch64/sync-op-full-ool.c
Normal file
9
gcc/testsuite/gcc.target/aarch64/sync-op-full-ool.c
Normal file
@ -0,0 +1,9 @@
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/* { dg-do compile } */
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/* { dg-options "-march=armv8-a+nolse -O2 -moutline-atomics" } */
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#include "sync-op-full.x"
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/* { dg-final { scan-assembler-times "bl.*__aarch64_ldadd4_sync" 1 } } */
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/* { dg-final { scan-assembler-times "bl.*__aarch64_ldclr4_sync" 1 } } */
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/* { dg-final { scan-assembler-times "bl.*__aarch64_ldeor4_sync" 1 } } */
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/* { dg-final { scan-assembler-times "bl.*__aarch64_ldset4_sync" 1 } } */
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@ -24,4 +24,4 @@ bar (void)
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}
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}
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/* { dg-final { scan-assembler-not "bl.*__aarch64_cas2_acq_rel" } } */
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/* { dg-final { scan-assembler-not "bl.*__aarch64_cas2_sync" } } */
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@ -24,4 +24,4 @@ bar (void)
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}
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}
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/* { dg-final { scan-assembler-times "bl.*__aarch64_cas2_acq_rel" 1 } } */
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/* { dg-final { scan-assembler-times "bl.*__aarch64_cas2_sync" 1 } } */
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@ -87,24 +87,44 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# define L
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# define M 0x000000
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# define N 0x000000
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# define BARRIER
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#elif MODEL == 2
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# define SUFF _acq
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# define A a
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# define L
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# define M 0x400000
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# define N 0x800000
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# define BARRIER
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#elif MODEL == 3
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# define SUFF _rel
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# define A
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# define L l
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# define M 0x008000
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# define N 0x400000
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# define BARRIER
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#elif MODEL == 4
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# define SUFF _acq_rel
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# define A a
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# define L l
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# define M 0x408000
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# define N 0xc00000
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# define BARRIER
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#elif MODEL == 5
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# define SUFF _sync
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#ifdef L_swp
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/* swp has _acq semantics. */
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# define A a
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# define L
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# define M 0x400000
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# define N 0x800000
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#else
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/* All other _sync functions have _seq semantics. */
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# define A a
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# define L l
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# define M 0x408000
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# define N 0xc00000
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#endif
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# define BARRIER dmb ish
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#else
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# error
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#endif
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@ -127,7 +147,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#endif
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#define NAME(BASE) glue4(__aarch64_, BASE, SIZE, SUFF)
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#define LDXR glue4(ld, A, xr, S)
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#if MODEL == 5
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/* Drop A for _sync functions. */
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# define LDXR glue3(ld, xr, S)
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#else
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# define LDXR glue4(ld, A, xr, S)
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#endif
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#define STXR glue4(st, L, xr, S)
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/* Temporary registers used. Other than these, only the return value
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@ -183,10 +208,16 @@ STARTFN NAME(cas)
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bne 1f
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STXR w(tmp1), s(1), [x2]
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cbnz w(tmp1), 0b
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1: ret
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1: BARRIER
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ret
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#else
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#define LDXP glue3(ld, A, xp)
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#if MODEL == 5
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/* Drop A for _sync functions. */
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# define LDXP glue2(ld, xp)
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#else
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# define LDXP glue3(ld, A, xp)
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#endif
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#define STXP glue3(st, L, xp)
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#ifdef HAVE_AS_LSE
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# define CASP glue3(casp, A, L) x0, x1, x2, x3, [x4]
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@ -205,7 +236,8 @@ STARTFN NAME(cas)
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bne 1f
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STXP w(tmp2), x2, x3, [x4]
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cbnz w(tmp2), 0b
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1: ret
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1: BARRIER
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ret
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#endif
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@ -229,6 +261,7 @@ STARTFN NAME(swp)
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0: LDXR s(0), [x1]
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STXR w(tmp1), s(tmp0), [x1]
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cbnz w(tmp1), 0b
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BARRIER
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ret
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ENDFN NAME(swp)
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@ -273,6 +306,7 @@ STARTFN NAME(LDNM)
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OP s(tmp1), s(0), s(tmp0)
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STXR w(tmp2), s(tmp1), [x1]
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cbnz w(tmp2), 0b
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BARRIER
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ret
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ENDFN NAME(LDNM)
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@ -18,13 +18,13 @@
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# along with GCC; see the file COPYING3. If not see
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# <http://www.gnu.org/licenses/>.
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# Compare-and-swap has 5 sizes and 4 memory models.
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# Compare-and-swap has 5 sizes and 5 memory models.
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S0 := $(foreach s, 1 2 4 8 16, $(addsuffix _$(s), cas))
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O0 := $(foreach m, 1 2 3 4, $(addsuffix _$(m)$(objext), $(S0)))
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O0 := $(foreach m, 1 2 3 4 5, $(addsuffix _$(m)$(objext), $(S0)))
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# Swap, Load-and-operate have 4 sizes and 4 memory models
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# Swap, Load-and-operate have 4 sizes and 5 memory models
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S1 := $(foreach s, 1 2 4 8, $(addsuffix _$(s), swp ldadd ldclr ldeor ldset))
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O1 := $(foreach m, 1 2 3 4, $(addsuffix _$(m)$(objext), $(S1)))
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O1 := $(foreach m, 1 2 3 4 5, $(addsuffix _$(m)$(objext), $(S1)))
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LSE_OBJS := $(O0) $(O1)
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